From 40d7a454a2ebc7d6a69c51cdd5be7924ea0d0191 Mon Sep 17 00:00:00 2001 From: Shaunak Saha Date: Wed, 2 Nov 2016 10:52:23 -0700 Subject: cpu/intel: Add MSR to support enabling turbo frequency This patch adds definition FREQ_LIMIT_RATIO MSR. FREQ_LIMIT_RATIO register allows to determine the ratio limits to be used to limit frequency. BUG=chrome-os-partner:58158 BRANCH=None Change-Id: I50a792accbaab1bff313fd00574814d7dbba1f6b Signed-off-by: Shaunak Saha Reviewed-on: https://review.coreboot.org/17211 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Aaron Durbin --- src/include/cpu/intel/speedstep.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/include/cpu/intel') diff --git a/src/include/cpu/intel/speedstep.h b/src/include/cpu/intel/speedstep.h index 09906df324..40234d5fca 100644 --- a/src/include/cpu/intel/speedstep.h +++ b/src/include/cpu/intel/speedstep.h @@ -46,7 +46,7 @@ #define MSR_PMG_IO_BASE_ADDR 0xe3 #define MSR_PMG_IO_CAPTURE_ADDR 0xe4 #define MSR_EXTENDED_CONFIG 0xee - +#define FREQ_LIMIT_RATIO 0x1AD typedef struct { uint8_t dynfsb : 1; /* whether this is SLFM */ -- cgit v1.2.3