From 6ca7636c8f52560e732cdd5b1c7829cda5aa2bde Mon Sep 17 00:00:00 2001 From: "arch import user (historical)" Date: Wed, 6 Jul 2005 17:17:25 +0000 Subject: Revision: linuxbios@linuxbios.org--devel/freebios--devel--2.0--patch-51 Creator: Yinghai Lu cache_as_ram for AMD and some intel git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1967 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/include/cpu/x86/cache.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/include/cpu/x86/cache.h') diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h index 623ef971ce..af7d3d52ef 100644 --- a/src/include/cpu/x86/cache.h +++ b/src/include/cpu/x86/cache.h @@ -41,7 +41,7 @@ static inline void disable_cache(void) wbinvd(); } -#ifndef __ROMCC__ +#if !defined( __ROMCC__) && defined (__GNUC__) void x86_enable_cache(void); #endif /* !__ROMCC__ */ -- cgit v1.2.3