From 505e3f7e852a5f3d9a37b702c9095443e6ad7d44 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 12 Sep 2019 21:37:53 +0300 Subject: arch/x86: Replace some __PRE_RAM__ use MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I4d8db430f8cd0bf0f161fc5cef052f153e59e2bc Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/35390 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/include/cpu/amd/mtrr.h | 2 +- src/include/cpu/x86/cache.h | 2 -- src/include/cpu/x86/lapic.h | 4 ---- 3 files changed, 1 insertion(+), 7 deletions(-) (limited to 'src/include/cpu') diff --git a/src/include/cpu/amd/mtrr.h b/src/include/cpu/amd/mtrr.h index f6b213e69d..edbf7bb2aa 100644 --- a/src/include/cpu/amd/mtrr.h +++ b/src/include/cpu/amd/mtrr.h @@ -38,7 +38,7 @@ #define TOP_MEM_MASK 0x007fffff #define TOP_MEM_MASK_KB (TOP_MEM_MASK >> 10) -#if !defined(__PRE_RAM__) && !defined(__ASSEMBLER__) +#if !defined(__ROMCC__) && !defined(__ASSEMBLER__) #include diff --git a/src/include/cpu/x86/cache.h b/src/include/cpu/x86/cache.h index 7f135e5390..713ca323a8 100644 --- a/src/include/cpu/x86/cache.h +++ b/src/include/cpu/x86/cache.h @@ -84,9 +84,7 @@ static __always_inline void disable_cache(void) wbinvd(); } -#if !defined(__PRE_RAM__) void x86_enable_cache(void); -#endif #endif /* !__ASSEMBLER__ */ #endif /* CPU_X86_CACHE */ diff --git a/src/include/cpu/x86/lapic.h b/src/include/cpu/x86/lapic.h index 2f40742e03..6fd1997e76 100644 --- a/src/include/cpu/x86/lapic.h +++ b/src/include/cpu/x86/lapic.h @@ -58,8 +58,6 @@ static __always_inline void stop_this_cpu(void) void stop_this_cpu(void); #endif -#if !defined(__PRE_RAM__) - #define xchg(ptr, v) ((__typeof__(*(ptr)))__xchg((unsigned long)(v), (ptr), \ sizeof(*(ptr)))) @@ -132,6 +130,4 @@ static inline void setup_lapic(void) struct device; int start_cpu(struct device *cpu); -#endif /* !__PRE_RAM__ */ - #endif /* CPU_X86_LAPIC_H */ -- cgit v1.2.3