From 89bb6ab40a5ba7c6fa7e3a222c21476b5846ee81 Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Tue, 13 Jun 2017 12:51:45 -0600 Subject: amd/family15h: Add defines for boost and P-state Add definitions for the P-state 0 MSR and Core Performance Boost Control. BUG=chrome-os-partner:62578062 Change-Id: I0c16dde17f1be41a3310c3ccefe3936aba0e8ec0 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/20199 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Martin Roth --- src/include/cpu/amd/amdfam15.h | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'src/include/cpu') diff --git a/src/include/cpu/amd/amdfam15.h b/src/include/cpu/amd/amdfam15.h index 8d3777e326..37fbc49b72 100644 --- a/src/include/cpu/amd/amdfam15.h +++ b/src/include/cpu/amd/amdfam15.h @@ -24,6 +24,8 @@ #define HWCR_MSR 0xC0010015 #define NB_CFG_MSR 0xC001001f +#define PSTATE_0_MSR 0xC0010064 + #define LS_CFG_MSR 0xC0011020 #define IC_CFG_MSR 0xC0011021 #define DC_CFG_MSR 0xC0011022 @@ -33,6 +35,8 @@ #define CPU_ID_FEATURES_MSR 0xC0011004 #define CPU_ID_EXT_FEATURES_MSR 0xC0011005 +#define CORE_PERF_BOOST_CTRL 0x15C + #if defined(__PRE_RAM__) void wait_all_core0_started(void); void wait_all_other_cores_started(u32 bsp_apicid); -- cgit v1.2.3