From 0c024208cdd3cfdfd7689b6fcba1b5c877f550c7 Mon Sep 17 00:00:00 2001 From: Dan Elkouby Date: Fri, 13 Apr 2018 18:45:02 +0300 Subject: device/dram/ddr3: improve XMP support - Fix offsets for supported CAS latencies - Add support for reading CWL and CMD rate from the profile Change-Id: Ie4f545ed1df92c146be02f56fea0ca9037478649 Signed-off-by: Dan Elkouby Reviewed-on: https://review.coreboot.org/25663 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph Reviewed-by: Paul Menzel --- src/include/device/dram/ddr3.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/include/device/dram') diff --git a/src/include/device/dram/ddr3.h b/src/include/device/dram/ddr3.h index 0756095588..9a246617d9 100644 --- a/src/include/device/dram/ddr3.h +++ b/src/include/device/dram/ddr3.h @@ -162,6 +162,8 @@ typedef struct dimm_attr_st { u32 tWTR; u32 tRTP; u32 tFAW; + u32 tCWL; + u16 tCMD; u8 reference_card; /* XMP: Module voltage in mV */ -- cgit v1.2.3