From 970f1a4101052a89e45d6034852ab544e7c7afd5 Mon Sep 17 00:00:00 2001 From: Meera Ravindranath Date: Tue, 27 Aug 2019 16:16:56 +0530 Subject: soc/intel/cnl: Add CML IGD IDs BUG=b:139798422 TEST=Build and boot CMLRVP. Change-Id: Ib79995606f6da12bfa7aa5c1a1dbc0b972bb1688 Signed-off-by: Meera Ravindranath Signed-off-by: Usha P Reviewed-on: https://review.coreboot.org/c/coreboot/+/35120 Tested-by: build bot (Jenkins) Reviewed-by: V Sowmya Reviewed-by: Subrata Banik Reviewed-by: Ronak Kanabar Reviewed-by: Lance Zhao --- src/include/device/pci_ids.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/include/device/pci_ids.h') diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index cdd1c623d0..5ad61e090d 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3083,6 +3083,8 @@ #define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_2 0x9B4A #define PCI_DEVICE_ID_INTEL_CML_GT1_ULT_3 0x9B2B #define PCI_DEVICE_ID_INTEL_CML_GT1_ULT_4 0x9B2C +#define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_5 0x9BAA +#define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_6 0x9BCA #define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_3 0x9B4B #define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_4 0x9B4C #define PCI_DEVICE_ID_INTEL_CML_GT1_ULX_1 0x9B20 -- cgit v1.2.3