From b6e97b19ae6a68556838c9801c7824302d72151f Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Sun, 9 Sep 2012 19:09:56 -0700 Subject: Add support for storing POST codes in CMOS This will use 3 bytes of CMOS to keep track of the POST code for the current boot while also leaving a record of the previous boot. The active bank is switched early in the bootblock. Test: 1) clear cmos 2) reboot 3) use "mosys nvram dump" to verify that the first byte contains 0x80 and the second byte contains 0xF8 4) powerd_suspend and then resume 5) use "mosys nvram dump" to verify that the first byte contains 0x81 and the second byte contains 0xFD Change-Id: I1ee6bb2dac053018f3042ab5a0b26c435dbfd151 Signed-off-by: Duncan Laurie Reviewed-on: http://review.coreboot.org/1743 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/include/pc80/mc146818rtc.h | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) (limited to 'src/include/pc80') diff --git a/src/include/pc80/mc146818rtc.h b/src/include/pc80/mc146818rtc.h index 61b522ca74..edc3241e42 100644 --- a/src/include/pc80/mc146818rtc.h +++ b/src/include/pc80/mc146818rtc.h @@ -158,4 +158,23 @@ static inline int get_option(void *dest __attribute__((unused)), #endif #define read_option(name, default) read_option_lowlevel(CMOS_VSTART_ ##name, CMOS_VLEN_ ##name, (default)) +#if CONFIG_CMOS_POST +#if CONFIG_USE_OPTION_TABLE +# include "option_table.h" +# define CMOS_POST_OFFSET (CMOS_VSTART_cmos_post_offset >> 3) +#else +# if defined(CONFIG_CMOS_POST_OFFSET) +# define CMOS_POST_OFFSET CONFIG_CMOS_POST_OFFSET +# else +# error "Must define CONFIG_CMOS_POST_OFFSET" +# endif +#endif + +#define CMOS_POST_BANK_OFFSET (CMOS_POST_OFFSET) +#define CMOS_POST_BANK_0_MAGIC 0x80 +#define CMOS_POST_BANK_0_OFFSET (CMOS_POST_OFFSET + 1) +#define CMOS_POST_BANK_1_MAGIC 0x81 +#define CMOS_POST_BANK_1_OFFSET (CMOS_POST_OFFSET + 2) +#endif /* CONFIG_CMOS_POST */ + #endif /* PC80_MC146818RTC_H */ -- cgit v1.2.3