From ce39ba97bc1906e7fbfec09312fcfec2919cf03e Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Sat, 4 Jan 2020 16:15:50 +0200
Subject: drivers/pc80/rtc: Reorganize prototypes
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Change-Id: Idea18f437c31ebe83dd61a185e614106a1f8f976
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38199
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
---
 src/include/post.h | 28 ++++++++++++++++++++++++++++
 1 file changed, 28 insertions(+)
 create mode 100644 src/include/post.h

(limited to 'src/include/post.h')

diff --git a/src/include/post.h b/src/include/post.h
new file mode 100644
index 0000000000..5c1e816ea7
--- /dev/null
+++ b/src/include/post.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/* This file is part of the coreboot project. */
+
+#ifndef __POST_H__
+#define __POST_H__
+
+#include <stdint.h>
+#include <device/device.h>
+
+void cmos_post_init(void);
+void cmos_post_code(u8 value);
+void cmos_post_extra(u32 value);
+void cmos_post_path(const struct device *dev);
+int cmos_post_previous_boot(u8 *code, u32 *extra);
+
+static inline void post_log_path(const struct device *dev)
+{
+	if (CONFIG(CMOS_POST) && dev)
+		cmos_post_path(dev);
+}
+
+static inline void post_log_clear(void)
+{
+	if (CONFIG(CMOS_POST))
+		cmos_post_extra(0);
+}
+
+#endif
-- 
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