From 61764f45dca2c5d5b3faaec1c912f3d50e8bd8e9 Mon Sep 17 00:00:00 2001
From: "Steven J. Magnani" <steve@digidescorp.com>
Date: Tue, 13 Sep 2005 14:54:25 +0000
Subject: Initial revision.

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2027 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/include/sdram_mode.h | 62 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 src/include/sdram_mode.h

(limited to 'src/include/sdram_mode.h')

diff --git a/src/include/sdram_mode.h b/src/include/sdram_mode.h
new file mode 100644
index 0000000000..f1b142e2ae
--- /dev/null
+++ b/src/include/sdram_mode.h
@@ -0,0 +1,62 @@
+/*
+ * $Header: /home/cvs/BIR/ca-cpu/freebios/src/include/sdram_mode.h,v 1.1 2005/07/11 16:03:54 smagnani Exp $
+ *
+ * sdram_mode.h: Definitions for SDRAM Mode Register and Extended Mode Register
+ *				 
+ *
+ * Copyright (C) 2005 Digital Design Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
+ *
+ * $Log: sdram_mode.h,v $
+ * Revision 1.1  2005/07/11 16:03:54  smagnani
+ * Initial revision.
+ *
+ *
+ */
+
+#ifndef __SDRAMMODE_H_DEFINED
+#define __SDRAMMODE_H_DEFINED
+
+// SDRAM Mode Register definitions, per JESD79D
+// These are transmitted via A0-A13
+
+// Burst length
+#define SDRAM_BURST_2     (1<<0)
+#define SDRAM_BURST_4     (2<<0)
+#define SDRAM_BURST_8     (3<<0)
+
+#define SDRAM_BURST_SEQUENTIAL  (0<<3)
+#define SDRAM_BURST_INTERLEAVED	(1<<3)
+
+#define SDRAM_CAS_2_0	  (2<<4)
+#define SDRAM_CAS_3_0     (3<<4)	/* Optional for DDR 200-333 */
+#define SDRAM_CAS_1_5     (5<<4)	/* Optional */
+#define SDRAM_CAS_2_5     (6<<4)
+#define SDRAM_CAS_MASK    (7<<4)
+
+#define SDRAM_MODE_NORMAL		(0 << 7)
+#define SDRAM_MODE_TEST         (1 << 7)
+#define SDRAM_MODE_DLL_RESET    (2 << 7)
+
+// Extended Mode Register
+
+#define SDRAM_EXTMODE_DLL_ENABLE	(0 << 0)
+#define SDRAM_EXTMODE_DLL_DISABLE	(1 << 0)
+
+#define SDRAM_EXTMODE_DRIVE_NORMAL	(0 << 1)
+#define SDRAM_EXTMODE_DRIVE_WEAK	(1 << 1)	/* Optional */
+
+#endif 	// __SDRAMMODE_H_DEFINED
-- 
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