From 31324c64e12135f09590884421cbcbcabec1a62f Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Thu, 5 Apr 2012 21:22:02 +0200 Subject: Fill out ChromeOS specific coreboot table extensions ChromeOS uses two extensions to the coreboot table: - ChromeOS specific GPIO description for onboard switches - position of verified boot area in nvram Change-Id: I8c389feec54c00faf2770aafbfd2223ac9da1362 Signed-off-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/866 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/include/boot/coreboot_tables.h | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) (limited to 'src/include') diff --git a/src/include/boot/coreboot_tables.h b/src/include/boot/coreboot_tables.h index 5535a38a7c..5d5ca2cf56 100644 --- a/src/include/boot/coreboot_tables.h +++ b/src/include/boot/coreboot_tables.h @@ -195,6 +195,33 @@ struct lb_framebuffer { uint8_t reserved_mask_size; }; +#define LB_TAG_GPIO 0x0013 + +struct lb_gpio { + uint32_t port; + uint32_t polarity; + uint32_t value; +#define GPIO_MAX_NAME_LENGTH 16 + uint8_t name[GPIO_MAX_NAME_LENGTH]; +}; + +struct lb_gpios { + uint32_t tag; + uint32_t size; + + uint32_t count; + struct lb_gpio gpios[0]; +}; + +#define LB_TAG_VDAT 0x0015 +struct lb_vdat { + uint32_t tag; + uint32_t size; + + void *vdat_addr; + uint32_t vdat_size; +}; + #define LB_TAG_TIMESTAMPS 0x0016 #define LB_TAG_CBMEM_CONSOLE 0x0017 #define LB_TAG_MRC_CACHE 0x0018 @@ -205,6 +232,15 @@ struct lb_cbmem_ref { void *cbmem_addr; }; +#define LB_TAG_VBNV 0x0019 +struct lb_vbnv { + uint32_t tag; + uint32_t size; + + uint32_t vbnv_start; + uint32_t vbnv_size; +}; + /* The following structures are for the cmos definitions table */ #define LB_TAG_CMOS_OPTION_TABLE 200 /* cmos header record */ -- cgit v1.2.3