From c641f7ed9f9083f73ddb69676a74d7e205351baa Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 28 Dec 2018 16:54:54 +0200 Subject: cpu/intel/car: Prepare for C_ENVIRONMENT_BOOTBLOCK MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Pass timestamps and BIST to romstage using the same signature as C_ENVIRONMENT_BOOTBLOCK will. Change-Id: Ic90da6b1b5ac3b56c69b593ba447ed8e05c8a4e2 Signed-off-by: Arthur Heymans Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/30492 Tested-by: build bot (Jenkins) --- src/include/cpu/intel/romstage.h | 4 ---- 1 file changed, 4 deletions(-) (limited to 'src/include') diff --git a/src/include/cpu/intel/romstage.h b/src/include/cpu/intel/romstage.h index 726a184eb1..47cd169e6a 100644 --- a/src/include/cpu/intel/romstage.h +++ b/src/include/cpu/intel/romstage.h @@ -7,8 +7,4 @@ void mainboard_romstage_entry(unsigned long bist); void platform_enter_postcar(void); -/* romstage_main is called from the cache-as-ram assembly file to prepare - * CAR stack guards.*/ -asmlinkage void *romstage_main(unsigned long bist); - #endif /* _CPU_INTEL_ROMSTAGE_H */ -- cgit v1.2.3