From 3fd259c91d54fbfcd45e1cfe73ddfbf2359ddd78 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 3 Sep 2017 15:23:17 +0300 Subject: postcar: Add cbmem_stage_cache MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit S3 resume path executing through postcar was unable to utilise cached ramstage in CBMEM. Change-Id: Icc8947c701ca32b4f261ebb78dfc1215b7ed2da0 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/21382 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/lib/Makefile.inc | 1 + 1 file changed, 1 insertion(+) (limited to 'src/lib/Makefile.inc') diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index e05b3fcc5d..e50eba663a 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -179,6 +179,7 @@ postcar-y += ext_stage_cache.c else ramstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c romstage-$(CONFIG_RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c +postcar-$(CONFIG_RELOCATABLE_RAMSTAGE) += cbmem_stage_cache.c endif -- cgit v1.2.3