From 4f14cd8a39e65811af08296633842289efa42927 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Wed, 18 Dec 2019 19:40:48 +0200 Subject: arch/x86,soc/intel: Drop RESET_ON_INVALID_RAMSTAGE_CACHE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit If stage cache is enabled, we should not allow S3 resume to load firmware from non-volatile memory. This also adds board reset for failing to load postcar from stage cache. Change-Id: Ib6cc7ad0fe9dcdf05b814d324b680968a2870f23 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/37682 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/lib/prog_loaders.c | 12 +++--------- 1 file changed, 3 insertions(+), 9 deletions(-) (limited to 'src/lib') diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 57874967ec..978ec16e6a 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -83,14 +83,6 @@ fail: int __weak prog_locate_hook(struct prog *prog) { return 0; } -static void ramstage_cache_invalid(void) -{ - printk(BIOS_ERR, "ramstage cache invalid.\n"); - if (CONFIG(RESET_ON_INVALID_RAMSTAGE_CACHE)) { - board_reset(); - } -} - static void run_ramstage_from_resume(struct prog *ramstage) { if (!romstage_handoff_is_resume()) @@ -105,7 +97,9 @@ static void run_ramstage_from_resume(struct prog *ramstage) printk(BIOS_DEBUG, "Jumping to image.\n"); prog_run(ramstage); } - ramstage_cache_invalid(); + + printk(BIOS_ERR, "ramstage cache invalid.\n"); + board_reset(); } static int load_relocatable_ramstage(struct prog *ramstage) -- cgit v1.2.3