From 6401fdb02593940e3091b1d200c64d9c1d7269f3 Mon Sep 17 00:00:00 2001
From: Kerry She <kerry.she@amd.com>
Date: Sat, 7 May 2011 09:15:02 +0000
Subject: ADVANSUS A785E-I Mainboard support, Family10h ASB2, RS880(RS785E) +
 SB820 platform.

Signed-off-by: Kerry She <kerry.she@amd.com>
Acked-by: Stefan Reinauer <stefan.reinauer@coreboot.org>


git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6561 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/mainboard/advansus/a785e-i/Kconfig | 112 +++++++++++++++++++++++++++++++++
 1 file changed, 112 insertions(+)
 create mode 100644 src/mainboard/advansus/a785e-i/Kconfig

(limited to 'src/mainboard/advansus/a785e-i/Kconfig')

diff --git a/src/mainboard/advansus/a785e-i/Kconfig b/src/mainboard/advansus/a785e-i/Kconfig
new file mode 100644
index 0000000000..933d86aa0f
--- /dev/null
+++ b/src/mainboard/advansus/a785e-i/Kconfig
@@ -0,0 +1,112 @@
+if BOARD_ADVANSUS_A785E_I
+
+config BOARD_SPECIFIC_OPTIONS # dummy
+	def_bool y
+	select ARCH_X86
+	select CPU_AMD_SOCKET_ASB2
+	select DIMM_DDR3
+	select DIMM_REGISTERED
+	select QRANK_DIMM_SUPPORT
+	select NORTHBRIDGE_AMD_AMDFAM10
+	select SOUTHBRIDGE_AMD_RS780
+	select SOUTHBRIDGE_AMD_CIMX_WRAPPER_SB800
+	select SUPERIO_WINBOND_W83627HF #COM1, COM2
+	#select SUPERIO_FINTEK_F81216AD #COM3, COM4
+	select HAVE_BUS_CONFIG
+	select HAVE_OPTION_TABLE
+	select HAVE_PIRQ_TABLE
+	select HAVE_MAINBOARD_RESOURCES
+	select HAVE_HARD_RESET
+	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
+	select LIFT_BSP_APIC_ID
+	select SERIAL_CPU_INIT
+	select AMDMCT
+	select HAVE_MP_TABLE
+	select HAVE_ACPI_TABLES
+	select BOARD_HAS_FADT
+	select GENERATE_ACPI_TABLES
+	select BOARD_ROMSIZE_KB_1024
+	select RAMINIT_SYSINFO
+	select ENABLE_APIC_EXT_ID
+	select TINY_BOOTBLOCK
+	select GFXUMA
+	select HAVE_DEBUG_CAR
+	select SET_FIDVID
+
+config AMD_CIMX_SB800
+        bool
+        default y
+
+config MAINBOARD_DIR
+	string
+	default advansus/a785e-i
+
+config APIC_ID_OFFSET
+	hex
+	default 0x0
+
+config MAINBOARD_PART_NUMBER
+	string
+	default "A785E-I"
+
+config HW_MEM_HOLE_SIZEK
+	hex
+	default 0x100000
+
+config MAX_CPUS
+	int
+	default 8
+
+config MAX_PHYSICAL_CPUS
+	int
+	default 1
+
+config HW_MEM_HOLE_SIZE_AUTO_INC
+	bool
+	default n
+
+config MEM_TRAIN_SEQ
+	int
+	default 2
+
+config SB_HT_CHAIN_ON_BUS0
+	int
+	default 1
+
+config HT_CHAIN_END_UNITID_BASE
+	hex
+	default 0x1
+
+config HT_CHAIN_UNITID_BASE
+	hex
+	default 0x0
+
+config IRQ_SLOT_COUNT
+	int
+	default 11
+
+config AMD_UCODE_PATCH_FILE
+	string
+	default "mc_patch_010000b6.h"
+
+config RAMTOP
+	hex
+	default 0x2000000
+
+config HEAP_SIZE
+	hex
+	default 0xc0000
+
+config RAMBASE
+	hex
+	default 0x200000
+
+config VGA_BIOS_ID
+        string
+        default "1002,9712"
+
+config WARNINGS_ARE_ERRORS
+        bool
+        default n
+
+endif #BOARD_ADVANSUS_A785E_I
-- 
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