From 6f32d80e1804de878dc750f649a15c24bd521a6f Mon Sep 17 00:00:00 2001 From: Nikolai Vyssotski Date: Wed, 11 Nov 2020 16:23:25 -0600 Subject: mb/amd/mandolin: Add decode range for LPC debug card Some LPC debug boards hard strap SIO address to be at 0x164e/0x164d vs 0x4e/0x4d. Add support for configurable SIO address to support these cards. BUG=b:159933344 TEST=boot with LPC debug card, verify serial output Change-Id: I103c61f21f13970dfa3b9a788b29964e478fb84c Signed-off-by: Nikolai Vyssotski Reviewed-on: https://review.coreboot.org/c/coreboot/+/47545 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/mainboard/amd/mandolin/Kconfig | 18 ++++++++++++++++++ src/mainboard/amd/mandolin/bootblock.c | 9 +++++++-- 2 files changed, 25 insertions(+), 2 deletions(-) (limited to 'src/mainboard/amd') diff --git a/src/mainboard/amd/mandolin/Kconfig b/src/mainboard/amd/mandolin/Kconfig index dde7ac8bed..b779630d56 100644 --- a/src/mainboard/amd/mandolin/Kconfig +++ b/src/mainboard/amd/mandolin/Kconfig @@ -29,6 +29,24 @@ config AMD_LPC_DEBUG_CARD PICASSO_CONSOLE_UART which selects the SoC's integrated memory-mapped UART for coreboot console output. +choice + prompt "SMSC/Microchip 1036 SuperIO config address" + depends on SUPERIO_SMSC_SIO1036 + default SMSC_SIO1036_BASE_164E + +config SMSC_SIO1036_BASE_4E + bool "0x4e/0x4d base address" + +config SMSC_SIO1036_BASE_164E + bool "0x164e/0x164d base address" + +endchoice + +config SUPERIO_ADDR_BASE + hex + default 0x4e if SMSC_SIO1036_BASE_4E + default 0x164e if SMSC_SIO1036_BASE_164E + config CBFS_SIZE hex default 0x7cf000 if BOARD_AMD_MANDOLIN # Maximum size for the Mandolin FMAP diff --git a/src/mainboard/amd/mandolin/bootblock.c b/src/mainboard/amd/mandolin/bootblock.c index 06da379d93..94a132938f 100644 --- a/src/mainboard/amd/mandolin/bootblock.c +++ b/src/mainboard/amd/mandolin/bootblock.c @@ -5,14 +5,19 @@ #include #include "gpio.h" -#define SERIAL_DEV PNP_DEV(0x4e, SIO1036_SP1) +#define SERIAL_DEV PNP_DEV(CONFIG_SUPERIO_ADDR_BASE, SIO1036_SP1) void bootblock_mainboard_early_init(void) { mainboard_program_early_gpios(); if (CONFIG(SUPERIO_SMSC_SIO1036)) { - lpc_enable_sio_decode(LPC_SELECT_SIO_4E4F); + if (CONFIG_SUPERIO_ADDR_BASE == 0x4e) { + lpc_enable_sio_decode(LPC_SELECT_SIO_4E4F); + } else { + // set up 16 byte wide I/O range window for the super IO + lpc_set_wideio_range(CONFIG_SUPERIO_ADDR_BASE & ~0xF, 16); + } lpc_enable_decode(DECODE_ENABLE_SERIAL_PORT0 << CONFIG_UART_FOR_CONSOLE); sio1036_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); } -- cgit v1.2.3