From a2cfe9e90001fe11f7c7653c9917ea75dd082333 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Thu, 3 Jan 2019 11:38:37 +0200 Subject: amdfam10 boards: Add Makefiles and fix resourcemap.c MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Also remove global ramstage-y += get_bus_conf.c, this is specific to amdfam10. Change-Id: I49b604ebff6bcfe85518b2c3896ab798c3c7878d Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/30629 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans Reviewed-by: Angel Pons --- src/mainboard/amd/bimini_fam10/Makefile.inc | 16 ++++++++++++++++ src/mainboard/amd/bimini_fam10/resourcemap.c | 6 +++++- src/mainboard/amd/bimini_fam10/romstage.c | 1 - src/mainboard/amd/mahogany_fam10/Makefile.inc | 16 ++++++++++++++++ src/mainboard/amd/mahogany_fam10/resourcemap.c | 6 +++++- src/mainboard/amd/mahogany_fam10/romstage.c | 1 - src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc | 4 ++++ src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c | 6 +++++- src/mainboard/amd/serengeti_cheetah_fam10/romstage.c | 1 - src/mainboard/amd/tilapia_fam10/Makefile.inc | 16 ++++++++++++++++ src/mainboard/amd/tilapia_fam10/resourcemap.c | 6 +++++- src/mainboard/amd/tilapia_fam10/romstage.c | 1 - 12 files changed, 72 insertions(+), 8 deletions(-) create mode 100644 src/mainboard/amd/bimini_fam10/Makefile.inc create mode 100644 src/mainboard/amd/mahogany_fam10/Makefile.inc create mode 100644 src/mainboard/amd/tilapia_fam10/Makefile.inc (limited to 'src/mainboard/amd') diff --git a/src/mainboard/amd/bimini_fam10/Makefile.inc b/src/mainboard/amd/bimini_fam10/Makefile.inc new file mode 100644 index 0000000000..91d4b39c32 --- /dev/null +++ b/src/mainboard/amd/bimini_fam10/Makefile.inc @@ -0,0 +1,16 @@ +# +# This file is part of the coreboot project. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +romstage-y += resourcemap.c + +ramstage-y += get_bus_conf.c diff --git a/src/mainboard/amd/bimini_fam10/resourcemap.c b/src/mainboard/amd/bimini_fam10/resourcemap.c index b647f48129..ce4351f8eb 100644 --- a/src/mainboard/amd/bimini_fam10/resourcemap.c +++ b/src/mainboard/amd/bimini_fam10/resourcemap.c @@ -13,7 +13,11 @@ * GNU General Public License for more details. */ -static void setup_mb_resource_map(void) +#include +#include +#include + +void setup_mb_resource_map(void) { static const unsigned int register_values[] = { /* Careful set limit registers before base registers which contain the enables */ diff --git a/src/mainboard/amd/bimini_fam10/romstage.c b/src/mainboard/amd/bimini_fam10/romstage.c index 6c40f6e036..3d86b60afc 100644 --- a/src/mainboard/amd/bimini_fam10/romstage.c +++ b/src/mainboard/amd/bimini_fam10/romstage.c @@ -45,7 +45,6 @@ #include "southbridge/amd/sb800/early_setup.c" #include -#include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" void activate_spd_rom(const struct mem_controller *ctrl); diff --git a/src/mainboard/amd/mahogany_fam10/Makefile.inc b/src/mainboard/amd/mahogany_fam10/Makefile.inc new file mode 100644 index 0000000000..91d4b39c32 --- /dev/null +++ b/src/mainboard/amd/mahogany_fam10/Makefile.inc @@ -0,0 +1,16 @@ +# +# This file is part of the coreboot project. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +romstage-y += resourcemap.c + +ramstage-y += get_bus_conf.c diff --git a/src/mainboard/amd/mahogany_fam10/resourcemap.c b/src/mainboard/amd/mahogany_fam10/resourcemap.c index acdf645a54..a4a1d9251a 100644 --- a/src/mainboard/amd/mahogany_fam10/resourcemap.c +++ b/src/mainboard/amd/mahogany_fam10/resourcemap.c @@ -15,7 +15,11 @@ -static void setup_mb_resource_map(void) +#include +#include +#include + +void setup_mb_resource_map(void) { static const unsigned int register_values[] = { /* Careful set limit registers before base registers which contain the enables */ diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index ef7afdeb71..b0d23b2dec 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -51,7 +51,6 @@ #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1) -#include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" void activate_spd_rom(const struct mem_controller *ctrl); diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc index e826e8153a..c9a38fab7e 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc +++ b/src/mainboard/amd/serengeti_cheetah_fam10/Makefile.inc @@ -2,3 +2,7 @@ $(eval $(call asl_template,ssdt2)) $(eval $(call asl_template,ssdt3)) $(eval $(call asl_template,ssdt4)) $(eval $(call asl_template,ssdt5)) + +romstage-y += resourcemap.c + +ramstage-y += get_bus_conf.c diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c b/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c index 0e47c52784..2a2380a3f9 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/resourcemap.c @@ -13,7 +13,11 @@ * GNU General Public License for more details. */ -static void setup_mb_resource_map(void) +#include +#include +#include + +void setup_mb_resource_map(void) { static const unsigned int register_values[] = { /* Careful set limit registers before base registers which contain the enables */ diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c index fcb10b1daa..03d3484105 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/romstage.c @@ -44,7 +44,6 @@ #include "southbridge/amd/amd8111/early_smbus.c" #include "southbridge/amd/amd8111/early_ctrl.c" -#include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #define SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1) diff --git a/src/mainboard/amd/tilapia_fam10/Makefile.inc b/src/mainboard/amd/tilapia_fam10/Makefile.inc new file mode 100644 index 0000000000..91d4b39c32 --- /dev/null +++ b/src/mainboard/amd/tilapia_fam10/Makefile.inc @@ -0,0 +1,16 @@ +# +# This file is part of the coreboot project. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; version 2 of the License. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# + +romstage-y += resourcemap.c + +ramstage-y += get_bus_conf.c diff --git a/src/mainboard/amd/tilapia_fam10/resourcemap.c b/src/mainboard/amd/tilapia_fam10/resourcemap.c index 5a4381424a..37b6d20797 100644 --- a/src/mainboard/amd/tilapia_fam10/resourcemap.c +++ b/src/mainboard/amd/tilapia_fam10/resourcemap.c @@ -13,7 +13,11 @@ * GNU General Public License for more details. */ -static void setup_mb_resource_map(void) +#include +#include +#include + +void setup_mb_resource_map(void) { static const unsigned int register_values[] = { /* Careful set limit registers before base registers which contain the enables */ diff --git a/src/mainboard/amd/tilapia_fam10/romstage.c b/src/mainboard/amd/tilapia_fam10/romstage.c index 0001f93260..50c7a002dd 100644 --- a/src/mainboard/amd/tilapia_fam10/romstage.c +++ b/src/mainboard/amd/tilapia_fam10/romstage.c @@ -47,7 +47,6 @@ #include #include -#include "resourcemap.c" #include "cpu/amd/quadcore/quadcore.c" #define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1) -- cgit v1.2.3