From 6e71aec6cda10636a692cde7f6e1156342614ca2 Mon Sep 17 00:00:00 2001
From: "Ronald G. Minnich" <rminnich@gmail.com>
Date: Thu, 25 Sep 2003 17:35:30 +0000
Subject: no default rom size

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/mainboard/arima/hdama/Config.lb    | 2 +-
 src/mainboard/arima/hdama/auto.c       | 8 +++++---
 src/mainboard/arima/hdama/irq_tables.c | 6 +++---
 3 files changed, 9 insertions(+), 7 deletions(-)

(limited to 'src/mainboard/arima')

diff --git a/src/mainboard/arima/hdama/Config.lb b/src/mainboard/arima/hdama/Config.lb
index 824e43ff67..97882302ed 100644
--- a/src/mainboard/arima/hdama/Config.lb
+++ b/src/mainboard/arima/hdama/Config.lb
@@ -69,7 +69,7 @@ option MAINBOARD_VENDOR="ARIMA"
 ###
 
 ## ROM_SIZE is the size of boot ROM that this board will use.
-option ROM_SIZE = 524288
+default ROM_SIZE = 524288
 
 ## ROM_IMAGE_SIZE is the amount of space to allow linuxBIOS to occupy.
 option ROM_IMAGE_SIZE = 65536
diff --git a/src/mainboard/arima/hdama/auto.c b/src/mainboard/arima/hdama/auto.c
index f977496a7b..f0651d1b09 100644
--- a/src/mainboard/arima/hdama/auto.c
+++ b/src/mainboard/arima/hdama/auto.c
@@ -19,6 +19,8 @@
 #include "debug.c"
 
 #define SIO_BASE 0x2e
+#define MAXIMUM_CONSOLE_LOGLEVEL 9
+#define DEFAULT_CONSOLE_LOGLEVEL 9
 
 static void memreset_setup(void)
 {
@@ -199,7 +201,7 @@ static void main(void)
 	enumerate_ht_chain(0);
 	distinguish_cpu_resets(0);
 	
-#if 0
+#if 1
 	print_pci_devices();
 #endif
 	enable_smbus();
@@ -209,10 +211,10 @@ static void main(void)
 	memreset_setup();
 	sdram_initialize(sizeof(cpu)/sizeof(cpu[0]), cpu);
 
-#if 0
+#if 1
 	dump_pci_devices();
 #endif
-#if 0
+#if 1
 	dump_pci_device(PCI_DEV(0, 0x18, 2));
 #endif
 
diff --git a/src/mainboard/arima/hdama/irq_tables.c b/src/mainboard/arima/hdama/irq_tables.c
index 5e4437ca11..2c0095c177 100644
--- a/src/mainboard/arima/hdama/irq_tables.c
+++ b/src/mainboard/arima/hdama/irq_tables.c
@@ -12,7 +12,7 @@ const struct irq_routing_table intel_irq_routing_table = {
 	PIRQ_SIGNATURE, /* u32 signature */
 	PIRQ_VERSION,   /* u16 version   */
 	32+16*18,        /* there can be total 18 devices on the bus */
-	0,           /* Where the interrupt router lies (bus) */
+	1,           /* Where the interrupt router lies (bus) */
 	0x23,           /* Where the interrupt router lies (dev) */
 	0,         /* IRQs devoted exclusively to PCI usage */
 	0x1022,         /* Vendor */
@@ -25,8 +25,8 @@ const struct irq_routing_table intel_irq_routing_table = {
 		{0,0x50, {{0x1, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
 		{0x2,0x8, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x3, 0},
 		{0x2,0x10, {{0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}, {0x2, 0xdef8}}, 0x4, 0},
-		{0x1,0x18, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x0, 0},
-		{0x1,0x20, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x0, 0},
+		{0x2,0x18, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x0, 0},
+		{0x2,0x20, {{0x4, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0x0, 0},
 		{0x2,0x28, {{0x2, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0xa, 0},
 		{0,0x58, {{0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}, {0, 0xdef8}}, 0, 0},
 		{0x3,0x8, {{0x2, 0xdef8}, {0x3, 0xdef8}, {0x4, 0xdef8}, {0x1, 0xdef8}}, 0x1, 0},
-- 
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