From c3422235b14d97c16bd13113c522827d1cfda9b4 Mon Sep 17 00:00:00 2001 From: Zheng Bao Date: Mon, 28 Mar 2011 03:33:10 +0000 Subject: SP5100's code is based on SB700. Change the legacy sb700 of sb7xx_51xx. Since the SB700 has changed to sb7xx_51xx, change legacy name in other mainboard. Signed-off-by: Zheng Bao Acked-by: Marc Jones git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6463 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/asrock/939a785gmh/mainboard.c | 2 +- src/mainboard/asrock/939a785gmh/romstage.c | 12 ++++++------ 2 files changed, 7 insertions(+), 7 deletions(-) (limited to 'src/mainboard/asrock/939a785gmh') diff --git a/src/mainboard/asrock/939a785gmh/mainboard.c b/src/mainboard/asrock/939a785gmh/mainboard.c index c7eedeafb8..1cf1731ce1 100644 --- a/src/mainboard/asrock/939a785gmh/mainboard.c +++ b/src/mainboard/asrock/939a785gmh/mainboard.c @@ -168,7 +168,7 @@ struct chip_operations mainboard_ops = { }; /* override the default SATA PHY setup */ -void sb700_setup_sata_phys(struct device *dev) { +void sb7xx_51xx_setup_sata_phys(struct device *dev) { /* RPR7.6.1 Program the PHY Global Control to 0x2C00 */ pci_write_config16(dev, 0x86, 0x2c00); diff --git a/src/mainboard/asrock/939a785gmh/romstage.c b/src/mainboard/asrock/939a785gmh/romstage.c index 051f6e957b..ce79e0d204 100644 --- a/src/mainboard/asrock/939a785gmh/romstage.c +++ b/src/mainboard/asrock/939a785gmh/romstage.c @@ -146,22 +146,22 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* Nothing special needs to be done to find bus 0 */ /* Allow the HT devices to be found */ enumerate_ht_chain(); - /* sb700_lpc_port80(); */ - sb700_pci_port80(); + /* sb7xx_51xx_lpc_port80(); */ + sb7xx_51xx_pci_port80(); } if (bist == 0) bsp_apicid = init_cpus(cpu_init_detectedx, sysinfo); enable_rs780_dev8(); - sb700_lpc_init(); + sb7xx_51xx_lpc_init(); sio_init(); w83627dhg_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); uart_init(); #if CONFIG_USBDEBUG - sb700_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); + sb7xx_51xx_enable_usbdebug(CONFIG_USBDEBUG_DEFAULT_PORT); early_usbdebug_init(); #endif @@ -186,7 +186,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) /* run _early_setup before soft-reset. */ rs780_early_setup(); - sb700_early_setup(); + sb7xx_51xx_early_setup(); /* Check to see if processor is capable of changing FIDVID */ /* otherwise it will throw a GP# when reading FIDVID_STATUS */ @@ -226,7 +226,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) sdram_initialize(sysinfo->nodes, sysinfo->ctrl, sysinfo); rs780_before_pci_init(); - sb700_before_pci_init(); + sb7xx_51xx_before_pci_init(); post_cache_as_ram(); } -- cgit v1.2.3