From 9f78127b61632cbb138bdbfa650c2e9965440d3b Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Sat, 25 Jul 2020 14:03:40 +0200 Subject: lynxpoint: Factor out PIRQ routing from devicetree All boards disable PIRQs. They aren't used on modern OSes anyway. Change-Id: I1351fd4a3910e8cf2e9afe51dc2e82c7464de403 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/43863 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/asrock/b85m_pro4/devicetree.cb | 8 -------- 1 file changed, 8 deletions(-) (limited to 'src/mainboard/asrock/b85m_pro4') diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb index b724652ea6..106df54e01 100644 --- a/src/mainboard/asrock/b85m_pro4/devicetree.cb +++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb @@ -27,14 +27,6 @@ chip northbridge/intel/haswell chip southbridge/intel/lynxpoint register "gen1_dec" = "0x000c0291" # Super I/O HWM - register "pirqa_routing" = "0x80" - register "pirqb_routing" = "0x80" - register "pirqc_routing" = "0x80" - register "pirqd_routing" = "0x80" - register "pirqe_routing" = "0x80" - register "pirqf_routing" = "0x80" - register "pirqg_routing" = "0x80" - register "pirqh_routing" = "0x80" register "sata_ahci" = "1" register "sata_port_map" = "0x3f" -- cgit v1.2.3