From db6c5bfd8bdef4489e7fec533cb2ca8ae6c24cf3 Mon Sep 17 00:00:00 2001 From: Jens Rottmann Date: Thu, 21 Mar 2013 22:21:28 +0100 Subject: Asrock E350M1: Use SPD read code from F14 wrapper Changes: - Get rid of the E350M1 mainboard specific code and use the platform generic function wrapper that was added in change http://review.coreboot.org/#/c/2497/ AMD f14: Add SPD read functions to wrapper code - Move DIMM addresses into devicetree.cb - Add the ASF init that used to be in the SPD read code into mainboard_enable() Notes: - The DIMM reads only happen in romstage, so the function is not available in ramstage. Point the read-SPD callback to a generic function in ramstage. Change-Id: I08c2aebc62facc14f94400ee1ad188901ba73f19 Signed-off-by: Jens Rottmann Reviewed-on: http://review.coreboot.org/2875 Reviewed-by: Paul Menzel Tested-by: build bot (Jenkins) --- src/mainboard/asrock/e350m1/Makefile.inc | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/asrock/e350m1/Makefile.inc') diff --git a/src/mainboard/asrock/e350m1/Makefile.inc b/src/mainboard/asrock/e350m1/Makefile.inc index 50f9447003..59c6cd0ff8 100644 --- a/src/mainboard/asrock/e350m1/Makefile.inc +++ b/src/mainboard/asrock/e350m1/Makefile.inc @@ -19,13 +19,11 @@ romstage-y += buildOpts.c romstage-y += agesawrapper.c -romstage-y += dimmSpd.c romstage-y += BiosCallOuts.c romstage-y += PlatformGnbPcie.c ramstage-y += buildOpts.c ramstage-y += agesawrapper.c -ramstage-y += dimmSpd.c ramstage-y += BiosCallOuts.c ramstage-y += PlatformGnbPcie.c -- cgit v1.2.3