From 5f82370d7bc4ba385ae8911cbfdabd4450f0e944 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 21 May 2020 01:06:28 +0200 Subject: AGESA f14/f15tn/f16kb: Factor out PCI MMIO base/size We set BLDCFG_PCI_MMIO_BASE and BLDCFG_PCI_MMIO_SIZE to the same values everywhere, so we might as well factor them out. As we have equivalent Kconfig options in coreboot, also deprecate overriding them via BLDCFG. TEST=Use abuild --timeless to check that all AGESA f14/f15tn/f16kb mainboards result in identical coreboot binaries. Change-Id: I7244c39d2c2aa02a3a9092ddae98e4ac9da89107 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/41595 Tested-by: build bot (Jenkins) Reviewed-by: Mike Banon --- src/mainboard/asrock/imb-a180/buildOpts.c | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/asrock/imb-a180') diff --git a/src/mainboard/asrock/imb-a180/buildOpts.c b/src/mainboard/asrock/imb-a180/buildOpts.c index 97d49c765d..99b6180c71 100644 --- a/src/mainboard/asrock/imb-a180/buildOpts.c +++ b/src/mainboard/asrock/imb-a180/buildOpts.c @@ -66,8 +66,6 @@ //#define BLDCFG_FORCE_INDEPENDENT_PSD_OBJECT TRUE -#define BLDCFG_PCI_MMIO_BASE CONFIG_MMCONF_BASE_ADDRESS -#define BLDCFG_PCI_MMIO_SIZE CONFIG_MMCONF_BUS_NUMBER /* Build configuration values here. */ #define BLDCFG_VRM_CURRENT_LIMIT 15000 -- cgit v1.2.3