From af258cc1791b5c46fcb13d41128cc99043a435be Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= Date: Sun, 1 Dec 2019 17:42:04 +0100 Subject: mb/*/*: use ACPIMMIO common block wherever possible MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit TEST=boot PC Engines apu2 and launch Debian Linux Signed-off-by: Michał Żygowski Change-Id: I648167ec94367c9494c4253bec21dab20ad7b615 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/37401 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/asrock/imb-a180/bootblock.c | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) (limited to 'src/mainboard/asrock/imb-a180') diff --git a/src/mainboard/asrock/imb-a180/bootblock.c b/src/mainboard/asrock/imb-a180/bootblock.c index eb5641ff5e..e87dc21f87 100644 --- a/src/mainboard/asrock/imb-a180/bootblock.c +++ b/src/mainboard/asrock/imb-a180/bootblock.c @@ -21,20 +21,14 @@ void bootblock_mainboard_early_init(void) { - u32 reg32; - /* Disable PCI-PCI bridge and release GPIO32/33 for other uses. */ pm_write8(0xea, 0x1); /* Set auxiliary output clock frequency on OSCOUT1 pin to be 48MHz */ - reg32 = misc_read32(0x28); - reg32 &= 0xfff8ffff; - misc_write32(0x28, reg32); + misc_write32(0x28, misc_read32(0x28) & 0xfff8ffff); /* Enable Auxiliary Clock1, disable FCH 14 MHz OscClk */ - reg32 = misc_read32(0x40); - reg32 &= 0xffffbffb; - misc_write32(0x40, reg32); + misc_write32(0x40, misc_read32(0x40) & 0xffffbffb); /* w83627uhg has a default clk of 48MHz, p.9 of data-sheet */ winbond_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); -- cgit v1.2.3