From 17c577153042b6559bf7a9dca6ae9f644b18d770 Mon Sep 17 00:00:00 2001 From: Vagiz Trakhanov Date: Thu, 28 Sep 2017 14:21:54 +0000 Subject: superio/ite/common: Add temperature offset MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a devicetree option to set temperature adjustment registers required for thermal diode sensors and PECI. However, this commit does not have the code needed to make PECI interface actually use these registers. It only applies to diodes. As a temporary workaround, one can set both THERMAL_DIODE and peci_tmpin to the same TMPIN, e.g. TMPIN3.mode="THERMAL_DIODE" and peci_tmpin="3". PECI, apparently, takes precedence over diode, so the adjustment register will be set and PECI activated. Or simply use the followup patch, which makes THERMAL_PECI a mode like THERMAL_DIODE. I don't have hardware to test THERMAL_DIODE mode, but in case of PECI, without this patch I had about -60°C on idle. Now, with offset 97, which was taken from vendor bios, PECI readings became reasonable 35°C. TEST=Set a temperature offset, then ensure that the value you set is reflected in /sys/class/hwmon/hwmon*/temp[1-3]_offset Change-Id: Ibce6809ca86b6c7c0c696676e309665fc57965d4 Signed-off-by: Vagiz Tarkhanov Reviewed-on: https://review.coreboot.org/21843 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/asus/f2a85-m/devicetree_f2a85-m.cb | 6 +++--- src/mainboard/asus/f2a85-m/devicetree_f2a85-m_le.cb | 6 +++--- 2 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/mainboard/asus/f2a85-m') diff --git a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m.cb b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m.cb index e1fbc51572..349a84533d 100644 --- a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m.cb +++ b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m.cb @@ -58,9 +58,9 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 14.2 on end # HDA 0x4383 device pci 14.3 on # LPC 0x439d chip superio/ite/it8728f - register "TMPIN1" = "THERMAL_RESISTOR" - register "TMPIN2" = "THERMAL_RESISTOR" - register "TMPIN3" = "THERMAL_RESISTOR" + register "TMPIN1.mode" = "THERMAL_RESISTOR" + register "TMPIN2.mode" = "THERMAL_RESISTOR" + register "TMPIN3.mode" = "THERMAL_RESISTOR" register "FAN1.mode" = "FAN_SMART_AUTOMATIC" register "FAN1.smart.tmpin" = "1" diff --git a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_le.cb b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_le.cb index 128ff1847d..af0e4cc9db 100644 --- a/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_le.cb +++ b/src/mainboard/asus/f2a85-m/devicetree_f2a85-m_le.cb @@ -58,9 +58,9 @@ chip northbridge/amd/agesa/family15tn/root_complex device pci 14.2 on end # HDA 0x4383 device pci 14.3 on # LPC 0x439d chip superio/ite/it8728f - register "TMPIN1" = "THERMAL_RESISTOR" - register "TMPIN2" = "THERMAL_RESISTOR" - register "TMPIN3" = "THERMAL_RESISTOR" + register "TMPIN1.mode" = "THERMAL_RESISTOR" + register "TMPIN2.mode" = "THERMAL_RESISTOR" + register "TMPIN3.mode" = "THERMAL_RESISTOR" register "FAN1.mode" = "FAN_SMART_AUTOMATIC" register "FAN1.smart.tmpin" = "1" -- cgit v1.2.3