From fa5d0f835b1f3bb8907e616913cbf7b91d09ef26 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Tue, 12 Nov 2019 19:11:50 +0100 Subject: nb/intel/sandybridge: Set up console in bootblock Change-Id: Ia041b63201b2a4a2fe6ab11e3497c460f88061d1 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/36784 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/asus/h61m-cs/Makefile.inc | 2 ++ src/mainboard/asus/h61m-cs/early_init.c | 60 +++++++++++++++++++++++++++++++++ src/mainboard/asus/h61m-cs/romstage.c | 59 -------------------------------- 3 files changed, 62 insertions(+), 59 deletions(-) create mode 100644 src/mainboard/asus/h61m-cs/early_init.c delete mode 100644 src/mainboard/asus/h61m-cs/romstage.c (limited to 'src/mainboard/asus/h61m-cs') diff --git a/src/mainboard/asus/h61m-cs/Makefile.inc b/src/mainboard/asus/h61m-cs/Makefile.inc index af2b6742f0..f0b34f9840 100644 --- a/src/mainboard/asus/h61m-cs/Makefile.inc +++ b/src/mainboard/asus/h61m-cs/Makefile.inc @@ -1,3 +1,5 @@ bootblock-y += gpio.c romstage-y += gpio.c ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads +bootblock-y += early_init.c +romstage-y += early_init.c diff --git a/src/mainboard/asus/h61m-cs/early_init.c b/src/mainboard/asus/h61m-cs/early_init.c new file mode 100644 index 0000000000..2720e7a676 --- /dev/null +++ b/src/mainboard/asus/h61m-cs/early_init.c @@ -0,0 +1,60 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2008-2009 coresystems GmbH + * Copyright (C) 2014 Vladimir Serbinenko + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +#define SIO_PORT 0x2e +#define SIO_DEV PNP_DEV(SIO_PORT, 0) +#define ACPI_DEV PNP_DEV(SIO_PORT, NCT6779D_ACPI) + +const struct southbridge_usb_port mainboard_usb_ports[] = { + { 1, 0, 0 }, + { 1, 0, 0 }, + { 1, 0, 1 }, + { 1, 0, 1 }, + { 1, 0, 2 }, + { 1, 0, 2 }, + { 1, 0, 3 }, + { 1, 0, 3 }, + { 1, 0, 4 }, + { 1, 0, 4 }, + { 1, 0, 6 }, + { 1, 0, 5 }, + { 1, 0, 5 }, + { 1, 0, 6 }, +}; + +void bootblock_mainboard_early_init(void) +{ + nuvoton_pnp_enter_conf_state(SIO_DEV); + pnp_set_logical_device(ACPI_DEV); + pnp_write_config(ACPI_DEV, 0xe4, 0x10); + nuvoton_pnp_exit_conf_state(SIO_DEV); +} + +void mainboard_get_spd(spd_raw_data *spd, bool id_only) +{ + read_spd(&spd[0], 0x50, id_only); + read_spd(&spd[2], 0x52, id_only); +} diff --git a/src/mainboard/asus/h61m-cs/romstage.c b/src/mainboard/asus/h61m-cs/romstage.c deleted file mode 100644 index 2aa243f4e8..0000000000 --- a/src/mainboard/asus/h61m-cs/romstage.c +++ /dev/null @@ -1,59 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2008-2009 coresystems GmbH - * Copyright (C) 2014 Vladimir Serbinenko - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include -#include -#include -#include - -#define SIO_PORT 0x2e -#define SIO_DEV PNP_DEV(SIO_PORT, 0) -#define ACPI_DEV PNP_DEV(SIO_PORT, NCT6779D_ACPI) - -const struct southbridge_usb_port mainboard_usb_ports[] = { - { 1, 0, 0 }, - { 1, 0, 0 }, - { 1, 0, 1 }, - { 1, 0, 1 }, - { 1, 0, 2 }, - { 1, 0, 2 }, - { 1, 0, 3 }, - { 1, 0, 3 }, - { 1, 0, 4 }, - { 1, 0, 4 }, - { 1, 0, 6 }, - { 1, 0, 5 }, - { 1, 0, 5 }, - { 1, 0, 6 }, -}; - -void mainboard_config_superio(void) -{ - nuvoton_pnp_enter_conf_state(SIO_DEV); - pnp_set_logical_device(ACPI_DEV); - pnp_write_config(ACPI_DEV, 0xe4, 0x10); - nuvoton_pnp_exit_conf_state(SIO_DEV); -} - -void mainboard_get_spd(spd_raw_data *spd, bool id_only) -{ - read_spd(&spd[0], 0x50, id_only); - read_spd(&spd[2], 0x52, id_only); -} -- cgit v1.2.3