From bb9722bd775d575401edff14a9b80406ecbd974a Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Thu, 28 Jul 2016 16:32:56 -0600 Subject: Add newlines at the end of all coreboot files MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I7930d5cded290f2605d0c92a9c465a3f0c1291a2 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/15974 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/asus/kcma-d8/spd_notes.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/asus/kcma-d8/spd_notes.txt') diff --git a/src/mainboard/asus/kcma-d8/spd_notes.txt b/src/mainboard/asus/kcma-d8/spd_notes.txt index ddd5cc84d6..d944229f00 100644 --- a/src/mainboard/asus/kcma-d8/spd_notes.txt +++ b/src/mainboard/asus/kcma-d8/spd_notes.txt @@ -43,4 +43,4 @@ After that, there's a cascade of small FETs and resistors in that region, eventu SuperIO pin 81 (VSBGATE#) enables the standby voltage rails when set LOW. VSBGATE# is reset on every assertion of PWRGOOD. -Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB. \ No newline at end of file +Setting SuperIO LDN 9 CRF4 bits 1 or 0 (or both) to 0 disables NICB. -- cgit v1.2.3