From c69c8ddc2b62f008fafc85c66d993fd498417287 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 13 Jun 2018 14:13:15 +0200 Subject: mb/asus/p5qpl-am: Add p5g41t-m_lx as a variant MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This board has more or less the same as the p5qpl-am except for DDR3 memory and different colors on the ports. Tested with Arch Linux with kernel 4.20.0-arch1-1-ARCH. What is tested and works: - 800/1066/1333 MHz CPUs and DDR3 sticks at 800/1066 MHz Some bugs are still present in the DDR3 raminit code though. - Ethernet - Internal programmer with both coreboot and stock firmware. - PCI and PCIe x1 slots - All USB ports - S3 resume - SATA ports - PEG - Rear audio output Change-Id: I92cd15a245c4f1d8f57b304c9c3a37ba29c35431 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/27089 Reviewed-by: Kyösti Mälkki Tested-by: build bot (Jenkins) --- src/mainboard/asus/p5qpl-am/devicetree.cb | 76 ++++++------------------------- 1 file changed, 13 insertions(+), 63 deletions(-) (limited to 'src/mainboard/asus/p5qpl-am/devicetree.cb') diff --git a/src/mainboard/asus/p5qpl-am/devicetree.cb b/src/mainboard/asus/p5qpl-am/devicetree.cb index f721f08dc2..63ae8ce3c5 100644 --- a/src/mainboard/asus/p5qpl-am/devicetree.cb +++ b/src/mainboard/asus/p5qpl-am/devicetree.cb @@ -2,6 +2,7 @@ # This file is part of the coreboot project. # # Copyright (C) 2017 Arthur Heymans +# Copyright (C) 2019 Angel Pons # # This program is free software; you can redistribute it and/or modify # it under the terms of the GNU General Public License as published by @@ -24,7 +25,6 @@ chip northbridge/intel/x4x # Northbridge end end device domain 0 on # PCI domain - subsystemid 0x1043 0x836d inherit device pci 0.0 on end # Host Bridge device pci 1.0 on end # PEG device pci 2.0 on end # Integrated graphics controller @@ -46,76 +46,26 @@ chip northbridge/intel/x4x # Northbridge register "sata_ahci" = "0x0" # AHCI not supported on this ICH7 variant register "gpe0_en" = "0x04000440" - device pci 1b.0 on end # Audio - device pci 1c.0 on end # PCIe 1 + device pci 1b.0 on end # Audio + device pci 1c.0 on end # PCIe 1: PCIe x1 slot device pci 1c.1 on # PCIe 2: NIC device pci 00.0 on end end device pci 1c.2 off end # PCIe 3 device pci 1c.3 off end # PCIe 4 - device pci 1c.4 off end # PCIe 5 - device pci 1c.5 off end # PCIe 6 - device pci 1d.0 on end # USB - device pci 1d.1 on end # USB - device pci 1d.2 on end # USB - device pci 1d.3 on end # USB - device pci 1d.7 on end # USB - device pci 1e.0 on end # PCI bridge + device pci 1d.0 on end # USB + device pci 1d.1 on end # USB + device pci 1d.2 on end # USB + device pci 1d.3 on end # USB + device pci 1d.7 on end # USB + device pci 1e.0 on end # PCI bridge device pci 1e.2 off end # AC'97 Audio Controller device pci 1e.3 off end # AC'97 Modem Controller - device pci 1f.0 on # ISA bridge - chip superio/winbond/w83627dhg - device pnp 2e.0 off end # Floppy - device pnp 2e.1 on # Parallel port - # global - irq 0x2c = 0x92 - # parallel port - io 0x60 = 0x378 - irq 0x70 = 7 - drq 0x74 = 3 - end - device pnp 2e.2 on # COM1 - io 0x60 = 0x3f8 - irq 0x70 = 4 - end - device pnp 2e.3 off end # COM2, IR - device pnp 2e.5 on # Keyboard, mouse - io 0x60 = 0x60 - io 0x62 = 0x64 - irq 0x70 = 1 - irq 0x72 = 12 - end - device pnp 2e.6 off end # SPI - device pnp 2e.7 on end # GPIO6 (all input) - device pnp 2e.8 off end # WDT0#, PLED - device pnp 2e.9 off end # GPIO2 - device pnp 2e.109 on # GPIO3 - irq 0xf0 = 0xf3 -# irq 0xf1 = 0x08 - end - device pnp 2e.209 on # GPIO4 - irq 0xf4 = 0x00 - end - device pnp 2e.309 off end # GPIO5 - device pnp 2e.a on # ACPI - irq 0x70 = 0 - irq 0xe4 = 0x10 # VSBGATE# to power dram during S3 - end - device pnp 2e.b on # HWM, front pannel LED - io 0x60 = 0x290 - irq 0x70 = 0 - end - device pnp 2e.c on # PECI, SST - irq 0xe0 = 0x10 - irq 0xe1 = 0x64 - irq 0xe8 = 0x01 - end - end - end - device pci 1f.1 on end # PATA/IDE - device pci 1f.2 on end # SATA - device pci 1f.3 on end # SMbus + device pci 1f.0 on end # ISA bridge + device pci 1f.1 on end # PATA/IDE + device pci 1f.2 on end # SATA + device pci 1f.3 on end # SMbus end end end -- cgit v1.2.3