From 16a70c3d40db0d31d8b6c6c13603d27ad6bf5be3 Mon Sep 17 00:00:00 2001 From: Mike Banon Date: Wed, 26 Jun 2019 09:38:03 +0300 Subject: asus/am1i-a: Enable UART according to CONFIG_UART_FOR_CONSOLE MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It has been observed by me and Elisenda Cuadros / Gergely Kiss [1] that the boot process of this board is super slow when UART 0 is being used - even if nothing is connected to it. Enable UART according to CONFIG_UART_FOR_CONSOLE - and, if UART 0 is selected, it will be initialized at romstage and this problem will not happen. [1] https://mail.coreboot.org/pipermail/coreboot/2018-February/086132.html Signed-off-by: Mike Banon Change-Id: I6579aa8fd092da84f8afdcc33496db45c582919f Reviewed-on: https://review.coreboot.org/c/coreboot/+/33796 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki Reviewed-by: Paul Menzel --- src/mainboard/asus/am1i-a/romstage.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/mainboard/asus') diff --git a/src/mainboard/asus/am1i-a/romstage.c b/src/mainboard/asus/am1i-a/romstage.c index 4b172eaad8..5e1218abd3 100644 --- a/src/mainboard/asus/am1i-a/romstage.c +++ b/src/mainboard/asus/am1i-a/romstage.c @@ -25,7 +25,15 @@ #include #define ITE_CONFIG_REG_CC 0x02 + +#if CONFIG_UART_FOR_CONSOLE == 0 +#define SERIAL_DEV PNP_DEV(0x2e, IT8623E_SP1) +#elif CONFIG_UART_FOR_CONSOLE == 1 #define SERIAL_DEV PNP_DEV(0x2e, IT8623E_SP2) +#else +#error "Invalid value for CONFIG_UART_FOR_CONSOLE" +#endif + #define GPIO_DEV PNP_DEV(0x2e, IT8623E_GPIO) #define CLKIN_DEV PNP_DEV(0x2e, IT8623E_GPIO) #define ENVC_DEV PNP_DEV(0x2e, IT8623E_EC) -- cgit v1.2.3