From b87a734771449ed06cd91621da4c893a1ad722b0 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Sat, 24 Sep 2016 08:53:34 +0200 Subject: mainboard/*/*/dsdt.asl: Use tabs for indents Change-Id: Idef587d8261784e916e8d50f4336cbcfca39b9b0 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/16730 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/asus/kcma-d8/dsdt.asl | 22 +++++++++++----------- src/mainboard/asus/kfsn4-dre/dsdt.asl | 14 +++++++------- src/mainboard/asus/kfsn4-dre_k8/dsdt.asl | 14 +++++++------- src/mainboard/asus/kgpe-d16/dsdt.asl | 22 +++++++++++----------- src/mainboard/asus/m5a88-v/dsdt.asl | 32 ++++++++++++++++---------------- 5 files changed, 52 insertions(+), 52 deletions(-) (limited to 'src/mainboard/asus') diff --git a/src/mainboard/asus/kcma-d8/dsdt.asl b/src/mainboard/asus/kcma-d8/dsdt.asl index d305af5cd4..dab489b393 100644 --- a/src/mainboard/asus/kcma-d8/dsdt.asl +++ b/src/mainboard/asus/kcma-d8/dsdt.asl @@ -31,13 +31,13 @@ */ DefinitionBlock ( - "DSDT.AML", /* Output filename */ - "DSDT", /* Signature */ - 0x03, /* DSDT Revision, needs to be 2 or higher for 64bit */ - "ASUS ", /* OEMID */ - "COREBOOT", /* TABLE ID */ - 0x00000001 /* OEM Revision */ - ) + "DSDT.AML", /* Output filename */ + "DSDT", /* Signature */ + 0x03, /* DSDT Revision, needs to be 2 or higher for 64bit */ + "ASUS ", /* OEMID */ + "COREBOOT", /* TABLE ID */ + 0x00000001 /* OEM Revision */ + ) { #include "northbridge/amd/amdfam10/amdfam10_util.asl" #include "southbridge/amd/sr5650/acpi/sr5650.asl" @@ -628,10 +628,10 @@ DefinitionBlock ( } Return (0x0) } - Method(_CRS, 0) - { - Return(CRS) - } + Method(_CRS, 0) + { + Return(CRS) + } } /* 0:14.4 PCI Bridge */ diff --git a/src/mainboard/asus/kfsn4-dre/dsdt.asl b/src/mainboard/asus/kfsn4-dre/dsdt.asl index bd4a76f3e2..2f1e86a14b 100644 --- a/src/mainboard/asus/kfsn4-dre/dsdt.asl +++ b/src/mainboard/asus/kfsn4-dre/dsdt.asl @@ -31,13 +31,13 @@ */ DefinitionBlock ( - "DSDT.AML", /* Output filename */ - "DSDT", /* Signature */ - 0x02, /* DSDT Revision, needs to be 2 for 64bit */ - "ASUS ", /* OEMID */ - "COREBOOT", /* TABLE ID */ - 0x00000001 /* OEM Revision */ - ) + "DSDT.AML", /* Output filename */ + "DSDT", /* Signature */ + 0x02, /* DSDT Revision, needs to be 2 for 64bit */ + "ASUS ", /* OEMID */ + "COREBOOT", /* TABLE ID */ + 0x00000001 /* OEM Revision */ + ) { #include "northbridge/amd/amdfam10/amdfam10_util.asl" diff --git a/src/mainboard/asus/kfsn4-dre_k8/dsdt.asl b/src/mainboard/asus/kfsn4-dre_k8/dsdt.asl index 9d5d520b36..ce01a49db8 100644 --- a/src/mainboard/asus/kfsn4-dre_k8/dsdt.asl +++ b/src/mainboard/asus/kfsn4-dre_k8/dsdt.asl @@ -31,13 +31,13 @@ */ DefinitionBlock ( - "DSDT.AML", /* Output filename */ - "DSDT", /* Signature */ - 0x02, /* DSDT Revision, needs to be 2 for 64bit */ - "ASUS ", /* OEMID */ - "COREBOOT", /* TABLE ID */ - 0x00000001 /* OEM Revision */ - ) + "DSDT.AML", /* Output filename */ + "DSDT", /* Signature */ + 0x02, /* DSDT Revision, needs to be 2 for 64bit */ + "ASUS ", /* OEMID */ + "COREBOOT", /* TABLE ID */ + 0x00000001 /* OEM Revision */ + ) { #include "northbridge/amd/amdk8/util.asl" diff --git a/src/mainboard/asus/kgpe-d16/dsdt.asl b/src/mainboard/asus/kgpe-d16/dsdt.asl index aa12e0e113..42242bfb67 100644 --- a/src/mainboard/asus/kgpe-d16/dsdt.asl +++ b/src/mainboard/asus/kgpe-d16/dsdt.asl @@ -31,13 +31,13 @@ */ DefinitionBlock ( - "DSDT.AML", /* Output filename */ - "DSDT", /* Signature */ - 0x03, /* DSDT Revision, needs to be 2 or higher for 64bit */ - "ASUS ", /* OEMID */ - "COREBOOT", /* TABLE ID */ - 0x00000001 /* OEM Revision */ - ) + "DSDT.AML", /* Output filename */ + "DSDT", /* Signature */ + 0x03, /* DSDT Revision, needs to be 2 or higher for 64bit */ + "ASUS ", /* OEMID */ + "COREBOOT", /* TABLE ID */ + 0x00000001 /* OEM Revision */ + ) { #include "northbridge/amd/amdfam10/amdfam10_util.asl" #include "southbridge/amd/sr5650/acpi/sr5650.asl" @@ -630,10 +630,10 @@ DefinitionBlock ( } Return (0x0) } - Method(_CRS, 0) - { - Return(CRS) - } + Method(_CRS, 0) + { + Return(CRS) + } } /* 0:14.4 PCI Bridge */ diff --git a/src/mainboard/asus/m5a88-v/dsdt.asl b/src/mainboard/asus/m5a88-v/dsdt.asl index 6f02e8b96f..e1d517f370 100644 --- a/src/mainboard/asus/m5a88-v/dsdt.asl +++ b/src/mainboard/asus/m5a88-v/dsdt.asl @@ -1540,8 +1540,8 @@ DefinitionBlock ( PEBM ) #endif - /* memory space for PCI BARs below 4GB */ - Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO) + /* memory space for PCI BARs below 4GB */ + Memory32Fixed(ReadOnly, 0x00000000, 0x00000000, MMIO) }) /* End Name(_SB.PCI0.CRES) */ Method(_CRS, 0) { @@ -1584,20 +1584,20 @@ DefinitionBlock ( Store(PBLN,EBML) } #endif - CreateDWordField(CRES, ^MMIO._BAS, MM1B) - CreateDWordField(CRES, ^MMIO._LEN, MM1L) - /* - * Declare memory between TOM1 and 4GB as available - * for PCI MMIO. - * Use ShiftLeft to avoid 64bit constant (for XP). - * This will work even if the OS does 32bit arithmetic, as - * 32bit (0x00000000 - TOM1) will wrap and give the same - * result as 64bit (0x100000000 - TOM1). - */ - Store(TOM1, MM1B) - ShiftLeft(0x10000000, 4, Local0) - Subtract(Local0, TOM1, Local0) - Store(Local0, MM1L) + CreateDWordField(CRES, ^MMIO._BAS, MM1B) + CreateDWordField(CRES, ^MMIO._LEN, MM1L) + /* + * Declare memory between TOM1 and 4GB as available + * for PCI MMIO. + * Use ShiftLeft to avoid 64bit constant (for XP). + * This will work even if the OS does 32bit arithmetic, as + * 32bit (0x00000000 - TOM1) will wrap and give the same + * result as 64bit (0x100000000 - TOM1). + */ + Store(TOM1, MM1B) + ShiftLeft(0x10000000, 4, Local0) + Subtract(Local0, TOM1, Local0) + Store(Local0, MM1L) Return(CRES) /* note to change the Name buffer */ } /* end of Method(_SB.PCI0._CRS) */ -- cgit v1.2.3