From f29200240e428761827ab8d179fa23068bfa9d59 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Sun, 27 Apr 2014 00:41:50 +1000 Subject: superio/ite/*: Factor out generic romstage component Following the reasoning of: cf7b498 superio/fintek/*: Factor out generic romstage component Change-Id: I4c0a9a5a7786eb8fcb0c3ed6251c7fe9bbbadae7 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/5585 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek --- src/mainboard/ecs/p6iwp-fe/romstage.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) (limited to 'src/mainboard/ecs') diff --git a/src/mainboard/ecs/p6iwp-fe/romstage.c b/src/mainboard/ecs/p6iwp-fe/romstage.c index 1ebdeddea0..c014c5785a 100644 --- a/src/mainboard/ecs/p6iwp-fe/romstage.c +++ b/src/mainboard/ecs/p6iwp-fe/romstage.c @@ -30,13 +30,17 @@ #include "northbridge/intel/i82810/raminit.h" #include "drivers/pc80/udelay_io.c" #include "cpu/x86/bist.h" -#include "superio/ite/it8712f/early_serial.c" +#include +#include #include +#define SERIAL_DEV PNP_DEV(0x2e, IT8712F_SP1) +#define CLKIN_DEV PNP_DEV(0x2e, IT8712F_GPIO) + void main(unsigned long bist) { - it8712f_24mhz_clkin(); - it8712f_enable_serial(0, CONFIG_TTYS0_BASE); // Does not use its 1st parameter + ite_conf_clkin(CLKIN_DEV, ITE_UART_CLK_PREDIVIDE_24); + ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); console_init(); report_bist_failure(bist); enable_smbus(); -- cgit v1.2.3