From 7d25651ed3eb78228a00b479454d0ab2417f3f2a Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sun, 20 Nov 2016 08:03:49 +0200 Subject: AGESA f14: Consolidate early P-states setting MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I3feed296b6ff9908e783c1221a8f61d9c548fef4 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/17564 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/elmex/pcm205400/romstage.c | 3 --- 1 file changed, 3 deletions(-) (limited to 'src/mainboard/elmex') diff --git a/src/mainboard/elmex/pcm205400/romstage.c b/src/mainboard/elmex/pcm205400/romstage.c index d553c1b52f..980ff3edbc 100644 --- a/src/mainboard/elmex/pcm205400/romstage.c +++ b/src/mainboard/elmex/pcm205400/romstage.c @@ -46,9 +46,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) { u32 val; - /* All cores: set pstate 0 (1600 MHz) early to save a few ms of boot time */ - __writemsr (0xc0010062, 0); - amd_initmmio(); if (!cpu_init_detectedx && boot_cpu()) { -- cgit v1.2.3