From bddf86a2594e809c32269508807fb4a4c50d573e Mon Sep 17 00:00:00 2001 From: Vladimir Serbinenko Date: Sat, 13 May 2017 20:21:37 +0000 Subject: vexpress: change to write32 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I5fcc83328441ccfb34ee63a7406d26e393633c21 Signed-off-by: Vladimir Serbinenko Reviewed-on: https://review.coreboot.org/19685 Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Patrick Rudolph --- src/mainboard/emulation/qemu-armv7/mainboard.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'src/mainboard/emulation/qemu-armv7') diff --git a/src/mainboard/emulation/qemu-armv7/mainboard.c b/src/mainboard/emulation/qemu-armv7/mainboard.c index c1fcc6ad59..39c2361eea 100644 --- a/src/mainboard/emulation/qemu-armv7/mainboard.c +++ b/src/mainboard/emulation/qemu-armv7/mainboard.c @@ -21,25 +21,26 @@ #include #include "mainboard.h" #include +#include static void init_gfx(void) { - volatile uint32_t *pl111; + uint32_t *pl111; struct edid edid; /* width is at most 4096 */ /* height is at most 1024 */ int width = 800, height = 600; uint32_t framebuffer = 0x4c000000; pl111 = (uint32_t *) 0x10020000; - pl111[0] = (width / 4) - 4; - pl111[1] = height - 1; + write32(pl111, (width / 4) - 4); + write32(pl111 + 1, height - 1); /* registers 2, 3 and 5 are ignored by qemu. Set them correctly if we ever go for real hw. */ /* framebuffer adress offset. Has to be in vram. */ - pl111[4] = framebuffer; - pl111[7] = 0; - pl111[10] = 0xff; - pl111[6] = (5 << 1) | 0x801; + write32(pl111 + 4, framebuffer); + write32(pl111 + 7, 0); + write32(pl111 + 10, 0xff); + write32(pl111 + 6, (5 << 1) | 0x801); edid.framebuffer_bits_per_pixel = 32; edid.bytes_per_line = width * 4; -- cgit v1.2.3