From 5135f1184df2809e4faeb4ecdcad4bc1cb5af70b Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Tue, 17 Apr 2018 14:00:34 +0200 Subject: RISC-V boards: Remove PAGETABLES section from memlayout.ld MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit RISC-V doesn't set up page tables anymore, since commit b26759d703 ("arch/riscv: Don't set up virtual memory"). Change-Id: Id1e759b63fb0bc88ab256994d3849d16814affa0 Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/25701 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich --- src/mainboard/emulation/spike-riscv/memlayout.ld | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/emulation/spike-riscv') diff --git a/src/mainboard/emulation/spike-riscv/memlayout.ld b/src/mainboard/emulation/spike-riscv/memlayout.ld index 8596723796..bae414ffd5 100644 --- a/src/mainboard/emulation/spike-riscv/memlayout.ld +++ b/src/mainboard/emulation/spike-riscv/memlayout.ld @@ -24,7 +24,7 @@ SECTIONS DRAM_START(START) BOOTBLOCK(START, 64K) STACK(START + 8M, 4K) - PAGETABLES(START + 8M + 4K, 60K) + /* hole at (START + 8M + 4K, 60K) */ ROMSTAGE(START + 8M + 64K, 128K) PRERAM_CBMEM_CONSOLE(START + 8M + 192k, 8K) RAMSTAGE(START + 8M + 200K, 256K) -- cgit v1.2.3