From be913983534a340cce81ad9da084abec9ff6311b Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sat, 15 Oct 2016 18:00:22 +0200 Subject: mb/gigabyte/ga-945gcm-s2l: add mainboard Startpoint was Intel d945gclf, which has same chipset and Gigabyte ga-g41m-es2l which has same Superio. What works and is tested: * PCI slot; * PCIe x16 slot with GPU (RADEON HD 2600 XT) and ADD2 DVI card; * onboard VGA output (only textmode implemented) with native graphic init; * 533, 800, 1067MHz FSB CPU (1333MHz is unsupported by the chipset); * serial output during and after boot. What does not work: * resume from suspend (does not work for d945gclf either). Quirks: * The Realtek ethernet card requires a reset which currently also hardcodes a MAC adress. This board was only tested with the SeaBIOS payload due to flash size constraints (512KB) and with GNU/Linux. Change-Id: I0ff9f193105facc1b276a791790e27eb4c275085 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/17033 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl | 53 +++++++++++++++++++++++++++ 1 file changed, 53 insertions(+) create mode 100644 src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl (limited to 'src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl') diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl new file mode 100644 index 0000000000..187481a1e2 --- /dev/null +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl @@ -0,0 +1,53 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +DefinitionBlock( + "dsdt.aml", + "DSDT", + 0x02, // DSDT revision: ACPI v2.0 + "COREv4", // OEM id + "COREBOOT", // OEM table id + 0x20090419 // OEM revision +) +{ + // Some generic macros + #include "acpi/platform.asl" + + // global NVS and variables + #include + #include + + // General Purpose Events + //#include "acpi/gpe.asl" + + // mainboard specific devices + #include "acpi/mainboard.asl" + + // Thermal Zone + //#include "acpi/thermal.asl" + + #include + + Scope (\_SB) { + Device (PCI0) + { + #include + #include + } + } + + /* Chipset specific sleep states */ + #include +} -- cgit v1.2.3