From 2437fe9dfab8e4056b633a39d51d07aa81ab3c9d Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 4 Oct 2019 13:59:29 +0200 Subject: sb/intel/i82801gx: Move CIR init to a common place Some boards with the G41 chipset lacked programming CIR, so this change add that to those boards too. Change-Id: Ia10c050785170fc743f7aef918f4849dbdd6840e Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/35795 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes --- src/mainboard/gigabyte/ga-g41m-es2l/romstage.c | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) (limited to 'src/mainboard/gigabyte/ga-g41m-es2l/romstage.c') diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c index 989a0cb941..d4ce9401c1 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c @@ -96,16 +96,7 @@ static void mb_gpio_init(void) RCBA8(OIC) = 0x03; RCBA8(OIC); - RCBA32(GCS) = 0x00190464; - RCBA32(CG) = 0x00000000; - RCBA32(0x3430) = 0x00000001; - RCBA32(0x3e00) = 0xff000001; - RCBA32(0x3e08) = 0x00000080; - RCBA32(0x3e0c) = 0x00800000; - RCBA32(0x3e40) = 0xff000001; - RCBA32(0x3e48) = 0x00000080; - RCBA32(0x3e4c) = 0x00800000; - RCBA32(0x3f00) = 0x0000000b; + ich7_setup_cir(); } static void ich7_enable_lpc(void) -- cgit v1.2.3