From f29200240e428761827ab8d179fa23068bfa9d59 Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Sun, 27 Apr 2014 00:41:50 +1000 Subject: superio/ite/*: Factor out generic romstage component Following the reasoning of: cf7b498 superio/fintek/*: Factor out generic romstage component Change-Id: I4c0a9a5a7786eb8fcb0c3ed6251c7fe9bbbadae7 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/5585 Tested-by: build bot (Jenkins) Reviewed-by: Rudolf Marek --- src/mainboard/gigabyte/ma785gmt/romstage.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'src/mainboard/gigabyte/ma785gmt') diff --git a/src/mainboard/gigabyte/ma785gmt/romstage.c b/src/mainboard/gigabyte/ma785gmt/romstage.c index ecee35b530..451cb7956c 100644 --- a/src/mainboard/gigabyte/ma785gmt/romstage.c +++ b/src/mainboard/gigabyte/ma785gmt/romstage.c @@ -37,7 +37,8 @@ #include "northbridge/amd/amdfam10/reset_test.c" #include #include "cpu/x86/bist.h" -#include "superio/ite/it8718f/early_serial.c" +#include +#include #include #include "northbridge/amd/amdfam10/setup_resource_map.c" #include "southbridge/amd/rs780/early_setup.c" @@ -45,6 +46,8 @@ #include "southbridge/amd/sb700/smbus.h" #include "northbridge/amd/amdfam10/debug.c" +#define SERIAL_DEV PNP_DEV(0x2e, IT8718F_SP1) + static void activate_spd_rom(const struct mem_controller *ctrl) { } static int spd_read_byte(u32 device, u32 address) @@ -91,7 +94,7 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx) enable_rs780_dev8(); sb7xx_51xx_lpc_init(); - it8718f_enable_serial(0, CONFIG_TTYS0_BASE); + ite_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); it8718f_disable_reboot(); console_init(); -- cgit v1.2.3