From 3db82be764bea9796a46bed436765f1194a29a27 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 18 May 2017 13:23:39 +0200 Subject: mb/gigabyte/ga-g41m-es2l: Enable IO decode range for LPT and FDD Change-Id: I77aabf98ea48c6e8bdbe322f89666935f59a289a Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/19760 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Paul Menzel --- src/mainboard/gigabyte/ga-g41m-es2l/romstage.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/mainboard/gigabyte') diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c index b16f736be2..67d3eb1310 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c @@ -123,7 +123,8 @@ static void ich7_enable_lpc(void) /* Decode range */ pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x80, 0x0010); pci_write_config16(PCI_DEV(0, 0x1f, 0), LPC_EN, - CNF1_LPC_EN | CNF2_LPC_EN | KBC_LPC_EN | COMA_LPC_EN | COMB_LPC_EN); + CNF1_LPC_EN | CNF2_LPC_EN | KBC_LPC_EN | FDD_LPC_EN + | LPT_LPC_EN | COMA_LPC_EN | COMB_LPC_EN); pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x88, 0x0291); pci_write_config16(PCI_DEV(0, 0x1f, 0), 0x8a, 0x007c); -- cgit v1.2.3