From 6267f5dd11aa43fd0bd84f84192db4ddaffa8575 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Sat, 15 Dec 2018 23:46:48 +0100 Subject: sb/intel/i82801gx: Autodisable functions based on devicetree This removes the need to synchronize the devicetree and the romstage writing to FD. Change-Id: I83576599538a02d295fe00b35826f98d8c97d1cf Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/30244 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c | 5 ----- src/mainboard/gigabyte/ga-g41m-es2l/romstage.c | 2 -- 2 files changed, 7 deletions(-) (limited to 'src/mainboard/gigabyte') diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c index 6c1da82af9..acf57445bb 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/romstage.c @@ -83,10 +83,6 @@ static void rcba_config(void) /* Enable IOAPIC */ RCBA8(OIC) = 0x03; - /* Disable unused devices */ - RCBA32(FD) = FD_PCIE6 | FD_PCIE5 | FD_PCIE4 | FD_PCIE3 - | FD_ACMOD | FD_ACAUD | 1; - /* Enable PCIe Root Port Clock Gate */ RCBA32(CG) = 0x00000001; } @@ -130,7 +126,6 @@ static void early_ich7_init(void) reg32 &= ~(3 << 0); reg32 |= (1 << 0); RCBA32(0x3430) = reg32; - RCBA32(FD) |= (1 << 0); RCBA16(0x0200) = 0x2008; RCBA8(0x2027) = 0x0d; RCBA16(0x3e08) |= (1 << 7); diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c index 4613c14d3a..78be08b3ba 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c @@ -101,8 +101,6 @@ static void mb_gpio_init(void) RCBA8(OIC); RCBA32(GCS) = 0x00190464; - RCBA32(FD) = FD_PCIE6 | FD_PCIE5 | FD_PCIE4 | FD_PCIE3 | FD_ACMOD - | FD_ACAUD | 1; RCBA32(CG) = 0x00000000; RCBA32(0x3430) = 0x00000001; RCBA32(0x3e00) = 0xff000001; -- cgit v1.2.3