From 7e6946a74c714ff109c35d97001b22c9e868aaea Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 21 Jan 2019 17:55:02 +0100 Subject: cpu/intel/model_206ax: Remove the notion of sockets With the memory controller the separate sockets becomes a useless distinction. They all used the same code anyway. UNTESTED: This also updates autoport. Change-Id: I044d434a5b8fca75db9eb193c7ffc60f3c78212b Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/31031 Reviewed-by: HAOUAS Elyes Reviewed-by: Tristan Corrick Tested-by: build bot (Jenkins) --- src/mainboard/gigabyte/ga-b75m-d3h/Kconfig | 1 - src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb | 4 +--- src/mainboard/gigabyte/ga-b75m-d3v/Kconfig | 1 - src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb | 4 +--- src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig | 1 - src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb | 4 +--- 6 files changed, 3 insertions(+), 12 deletions(-) (limited to 'src/mainboard/gigabyte') diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig index 360f7d1b3d..659f47c5b0 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig +++ b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig @@ -3,7 +3,6 @@ if BOARD_GIGABYTE_GA_B75M_D3H config BOARD_SPECIFIC_OPTIONS def_bool y select ARCH_X86 - select CPU_INTEL_SOCKET_LGA1155 select NORTHBRIDGE_INTEL_IVYBRIDGE select USE_NATIVE_RAMINIT select SOUTHBRIDGE_INTEL_C216 diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb index 2091346a17..7a3568aba3 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb +++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb @@ -4,9 +4,6 @@ chip northbridge/intel/sandybridge register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }" device cpu_cluster 0 on - chip cpu/intel/socket_LGA1155 - device lapic 0 on end - end chip cpu/intel/model_206ax register "c1_acpower" = "1" register "c2_acpower" = "3" @@ -15,6 +12,7 @@ chip northbridge/intel/sandybridge register "c2_battery" = "3" register "c3_battery" = "5" # Magic APIC ID to locate this chip + device lapic 0x0 on end device lapic 0xacac off end end end diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig b/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig index 2c01c06874..e01d4847ef 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig +++ b/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig @@ -3,7 +3,6 @@ if BOARD_GIGABYTE_GA_B75M_D3V config BOARD_SPECIFIC_OPTIONS def_bool y select ARCH_X86 - select CPU_INTEL_SOCKET_LGA1155 select NORTHBRIDGE_INTEL_IVYBRIDGE select USE_NATIVE_RAMINIT select SOUTHBRIDGE_INTEL_C216 diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb index 61c342a040..a00e2ee0c5 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb +++ b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb @@ -3,9 +3,6 @@ chip northbridge/intel/sandybridge register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }" device cpu_cluster 0 on - chip cpu/intel/socket_LGA1155 - device lapic 0 on end - end chip cpu/intel/model_206ax register "c1_acpower" = "1" register "c2_acpower" = "3" @@ -14,6 +11,7 @@ chip northbridge/intel/sandybridge register "c2_battery" = "3" register "c3_battery" = "5" # Magic APIC ID to locate this chip + device lapic 0x0 on end device lapic 0xacac off end end end diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig b/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig index a4595f53bf..39a70f8896 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig @@ -19,7 +19,6 @@ config BOARD_SPECIFIC_OPTIONS def_bool y select ARCH_X86 select BOARD_ROMSIZE_KB_4096 - select CPU_INTEL_SOCKET_LGA1155 select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select INTEL_INT15 diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb b/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb index bca7381159..667dd9c0b3 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb @@ -17,9 +17,6 @@ chip northbridge/intel/sandybridge register "gfx.ndid" = "3" register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }" device cpu_cluster 0x0 on - chip cpu/intel/socket_LGA1155 - device lapic 0x0 on end - end chip cpu/intel/model_206ax register "c1_acpower" = "1" register "c1_battery" = "1" @@ -27,6 +24,7 @@ chip northbridge/intel/sandybridge register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" + device lapic 0x0 on end device lapic 0xacac off end end end -- cgit v1.2.3