From ef7e98a2ac3449bc6a8d0cc73d7b54d41bc8bfa8 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 30 Dec 2016 21:07:18 +0100 Subject: nb/intel/x4x: Implement resume from S3 suspend It rewrites the results of receive enable stored in the upper nvram region, to avoid running receive enable again. Some debug info is also printed about the self-refresh registers. (Not enforcing a reset here, since 0 does not necessarily mean it's not in self-refresh). Change-Id: Ib54bc5c7b0fed6d975ffc31f037b5179d9e5600b Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/17998 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/gigabyte/ga-g41m-es2l/Kconfig | 1 + src/mainboard/gigabyte/ga-g41m-es2l/romstage.c | 7 +++++-- 2 files changed, 6 insertions(+), 2 deletions(-) (limited to 'src/mainboard/gigabyte') diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/Kconfig b/src/mainboard/gigabyte/ga-g41m-es2l/Kconfig index 3d2a892b60..ae57e5b379 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/Kconfig +++ b/src/mainboard/gigabyte/ga-g41m-es2l/Kconfig @@ -33,6 +33,7 @@ config BOARD_SPECIFIC_OPTIONS select REALTEK_8168_RESET select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT + select HAVE_ACPI_RESUME config MMCONF_BASE_ADDRESS hex diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c index d76fbb2434..0a1470b112 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/romstage.c @@ -132,6 +132,7 @@ void mainboard_romstage_entry(unsigned long bist) // ch0 ch1 const u8 spd_addrmap[4] = { 0x50, 0, 0x52, 0 }; u8 boot_path = 0; + u8 s3_resume; /* Disable watchdog timer */ RCBA32(0x3410) = RCBA32(0x3410) | 0x20; @@ -151,16 +152,18 @@ void mainboard_romstage_entry(unsigned long bist) x4x_early_init(); + s3_resume = southbridge_detect_s3_resume(); + if (s3_resume) + boot_path = BOOT_PATH_RESUME; if (MCHBAR32(PMSTS_MCHBAR) & PMSTS_WARM_RESET) boot_path = BOOT_PATH_WARM_RESET; printk(BIOS_DEBUG, "Initializing memory\n"); sdram_initialize(boot_path, spd_addrmap); quick_ram_check(); - cbmem_initialize_empty(); printk(BIOS_DEBUG, "Memory initialized\n"); - x4x_late_init(); + x4x_late_init(s3_resume); printk(BIOS_DEBUG, "x4x late init complete\n"); -- cgit v1.2.3