From 81ae67a634d3bd72b10f798490ee25c3a3cb807a Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Tue, 8 Nov 2016 15:04:30 -0600 Subject: Add Haswell Chromeboxes/Chromebase using variant board scheme Combine existing board google/panther with new ChromeOS devices mccloud, monroe, tricky, and zako, using their common reference board (beltino) as a base. Chromium sources used: firmware-mccloud-5827.B 65bfee7 [haswell: No need pre-graphics delay...] firmware-monroe-4921.B 1ac749d [Monroe: Disable KB/MS in ITE8772.] firmware-tricky-5829.B 2db5322 [haswell: No need pre-graphics delay...] firmware-zako-5219.B eacedef [haswell: No need pre-graphics delay...] Existing google/panther board will be removed in a subsequent commit. Variant setup modeled after google/reef Change-Id: I5d7e0c2551e8b0707841032460c35615cefb2886 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/17329 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/google/beltino/chromeos.fmd | 38 +++++++++++++++++++++++++++++++ 1 file changed, 38 insertions(+) create mode 100644 src/mainboard/google/beltino/chromeos.fmd (limited to 'src/mainboard/google/beltino/chromeos.fmd') diff --git a/src/mainboard/google/beltino/chromeos.fmd b/src/mainboard/google/beltino/chromeos.fmd new file mode 100644 index 0000000000..0c05ce95ce --- /dev/null +++ b/src/mainboard/google/beltino/chromeos.fmd @@ -0,0 +1,38 @@ +FLASH@0xff800000 0x800000 { + SI_ALL@0x0 0x200000 { + SI_DESC@0x0 0x1000 + SI_ME@0x1000 0x1ff000 + } + SI_BIOS@0x200000 0x600000 { + RW_SECTION_A@0x0 0xf0000 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0xdffc0 + RW_FWID_A@0xeffc0 0x40 + } + RW_SECTION_B@0xf0000 0xf0000 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0xdffc0 + RW_FWID_B@0xeffc0 0x40 + } + RW_MRC_CACHE@0x1e0000 0x10000 + RW_ELOG@0x1f0000 0x4000 + RW_SHARED@0x1f4000 0x4000 { + SHARED_DATA@0x0 0x2000 + VBLOCK_DEV@0x2000 0x2000 + } + RW_VPD@0x1f8000 0x2000 + RW_UNUSED@0x1fa000 0x6000 + RW_LEGACY(CBFS)@0x200000 0x200000 + WP_RO@0x400000 0x200000 { + RO_VPD@0x0 0x4000 + RO_UNUSED@0x4000 0xc000 + RO_SECTION@0x10000 0x1f0000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0x6f000 + COREBOOT(CBFS)@0x70000 0x180000 + } + } + } +} -- cgit v1.2.3