From e09eb68088983694ea2ad9694a1178ee0f8e33a5 Mon Sep 17 00:00:00 2001 From: Duncan Laurie Date: Tue, 8 Sep 2015 16:24:20 -0700 Subject: glados: Enable wake-on-wifi - Assign GPE DW0 to GPP_B block - Enable GPP_B16 as ACPI_SCI for wake - Define PCIe WLAN device in ACPI with GPE0_DW0_16 for _PRW Note that current designs cannot wake from Deep S3 via wifi. BUG=chrome-os-partner:40635 BRANCH=none TEST=tested on glados: 1-disable deep s3 in devicetree.cb 2-enable magic packet with "iw phy phy0 wowlan enable magic-packet" 3-powerd_dbus_suspend to go to S3 4-wake system with magic packet Change-Id: I989768615e9da8ecf6354852d2db7aae8069aa82 Signed-off-by: Patrick Georgi Original-Commit-Id: 894354c5bfd499b911b7f89310c48b503dbaadc2 Original-Change-Id: I9a7a317fc2eccc70fdb4862843de1a654fbc2eee Original-Signed-off-by: Duncan Laurie Original-Reviewed-on: https://chromium-review.googlesource.com/298231 Original-Reviewed-by: Aaron Durbin Reviewed-on: http://review.coreboot.org/11650 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/google/glados/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/mainboard/google/glados/devicetree.cb') diff --git a/src/mainboard/google/glados/devicetree.cb b/src/mainboard/google/glados/devicetree.cb index 60966c7e07..e57c4906ef 100644 --- a/src/mainboard/google/glados/devicetree.cb +++ b/src/mainboard/google/glados/devicetree.cb @@ -9,7 +9,7 @@ chip soc/intel/skylake # Note that GPE events called out in ASL code rely on this # route. i.e. If this route changes then the affected GPE # offset bits also need to be changed. - register "gpe0_dw0" = "GPP_C" + register "gpe0_dw0" = "GPP_B" register "gpe0_dw1" = "GPP_D" register "gpe0_dw2" = "GPP_E" -- cgit v1.2.3