From 64982c5002994270e1fc010cc8d2119c20f62184 Mon Sep 17 00:00:00 2001 From: Tom Warren Date: Thu, 23 Jan 2014 13:37:50 -0700 Subject: tegra/nyan*: sdram updates nyan_big: Add 204MHz BCT for bringup, use 1.2V for VDD_CPU Reviewed-on: https://chromium-review.googlesource.com/183939 (cherry picked from commit a6df76afb5342b805baca749abb8265e15748dc1) nyan_big: Add initial 792MHz BCT Reviewed-on: https://chromium-review.googlesource.com/183975 (cherry picked from commit 61d0122fdce6dc9479666bb0a5bc079c6389f78a) nyan_big: use RAM_CODE[3:2] for ram code Reviewed-on: https://chromium-review.googlesource.com/184076 (cherry picked from commit 35e5c5e473f871cdc897473a31586afbececd716) tegra124: support tri-state Board Id Reviewed-on: https://chromium-review.googlesource.com/183855 (cherry picked from commit 1a9d1bd73aa2cd0c36203b247976ad0d00a360e4) nyan*: Fix SPI pinmux configuration Reviewed-on: https://chromium-review.googlesource.com/184281 (cherry picked from commit ac4106b673c285af66d72392bd4a8522aba98489) nyan_big: Add 4GB 204/792MHz BCTs Reviewed-on: https://chromium-review.googlesource.com/184159 (cherry picked from commit 5ff002d09f8db0543b58962f6c0d24627fb0937e) tegra124: Add function for obtaining DRAM size via MC regs Reviewed-on: https://chromium-review.googlesource.com/184535 (cherry picked from commit d4580c46de649903a266a99eb11c9126ba385b48) tegra124/nyan*: Obtain DRAM size dynamically Reviewed-on: https://chromium-review.googlesource.com/184431 (cherry picked from commit a7db71744771decc04cf1966efba70bf4897cfa3) tegra124: Rearrange iRAM layout to allow more space for romstage Reviewed-on: https://chromium-review.googlesource.com/184240 (cherry picked from commit 6bdaabbc068146a4516c724b71d31bb777dabcfc) tegra124: Fix MemoryType field name in SDRAM parameters. Reviewed-on: https://chromium-review.googlesource.com/185113 (cherry picked from commit 9caccd1e86a8c683402fab87d9f3a49b87496e97) nyan_big: Initialize SDRAM without BootROM. Reviewed-on: https://chromium-review.googlesource.com/183624 (cherry picked from commit a1cbc00aa80ec1ea52e833a8e31c8e4b27160e70) tegra124: move FB_SIZE_MB to a more appropriate location Reviewed-on: https://chromium-review.googlesource.com/184930 (cherry picked from commit ddea486fd4410394417c4e59039d46a324918bdc) nyan: Initialize SDRAM without BootROM. Reviewed-on: https://chromium-review.googlesource.com/185114 (cherry picked from commit 1ff51b580b28553919f91b11b443251b048cf26b) tegra124: Save SDRAM parameters to PMC registers for LP0 Reviewed-on: https://chromium-review.googlesource.com/182928 (cherry picked from commit 7476b4bd0ecdc312476cce871d22f57915a0bd86) tegra124: Rewrite SDRAM parameter saving code to be more efficient Reviewed-on: https://chromium-review.googlesource.com/184388 (cherry picked from commit 25084bd0407624e4b2ff82388c32af1198c501a6) nyan: Slightly change the way SDRAM parameter files are set up Reviewed-on: https://chromium-review.googlesource.com/185286 (cherry picked from commit a31887b804f23e031c395113db582cd71f3d1b6d) Squashed 16 commits for SDRAM support on nyan and nyan_big. Change-Id: I07419985376277083d62400dd14fe8273f6d5ca8 Signed-off-by: Isaac Christensen Reviewed-on: http://review.coreboot.org/6949 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- .../google/nyan_big/bct/sdram-hynix-2GB-204.inc | 311 +++++++++++++++++++++ 1 file changed, 311 insertions(+) create mode 100644 src/mainboard/google/nyan_big/bct/sdram-hynix-2GB-204.inc (limited to 'src/mainboard/google/nyan_big/bct/sdram-hynix-2GB-204.inc') diff --git a/src/mainboard/google/nyan_big/bct/sdram-hynix-2GB-204.inc b/src/mainboard/google/nyan_big/bct/sdram-hynix-2GB-204.inc new file mode 100644 index 0000000000..d75e0b5272 --- /dev/null +++ b/src/mainboard/google/nyan_big/bct/sdram-hynix-2GB-204.inc @@ -0,0 +1,311 @@ +{ /* generated from sdram-0001-204-2GB.cfg; do not edit. */ + .MemoryType = NvBootMemoryType_Ddr3, + .PllMInputDivider = 0x00000001, + .PllMFeedbackDivider = 0x00000022, + .PllMStableTime = 0x0000012c, + .PllMSetupControl = 0x00000000, + .PllMSelectDiv2 = 0x00000000, + .PllMPDLshiftPh45 = 0x00000001, + .PllMPDLshiftPh90 = 0x00000001, + .PllMPDLshiftPh135 = 0x00000001, + .PllMKCP = 0x00000000, + .PllMKVCO = 0x00000000, + .EmcBctSpare0 = 0x00000000, + .EmcBctSpare1 = 0x00000000, + .EmcBctSpare2 = 0x00000000, + .EmcBctSpare3 = 0x00000000, + .EmcBctSpare4 = 0x00000000, + .EmcBctSpare5 = 0x00000000, + .EmcBctSpare6 = 0x00000000, + .EmcBctSpare7 = 0x00000000, + .EmcBctSpare8 = 0x00000000, + .EmcBctSpare9 = 0x00000000, + .EmcBctSpare10 = 0x00000000, + .EmcBctSpare11 = 0x00000000, + .EmcClockSource = 0x40000002, + .EmcAutoCalInterval = 0x001fffff, + .EmcAutoCalConfig = 0xa1430000, + .EmcAutoCalConfig2 = 0x00000000, + .EmcAutoCalConfig3 = 0x00000000, + .EmcAutoCalWait = 0x00000190, + .EmcAdrCfg = 0x00000000, + .EmcPinProgramWait = 0x00000001, + .EmcPinExtraWait = 0x00000000, + .EmcTimingControlWait = 0x00000000, + .EmcRc = 0x00000009, + .EmcRfc = 0x00000035, + .EmcRfcSlr = 0x00000000, + .EmcRas = 0x00000007, + .EmcRp = 0x00000002, + .EmcR2r = 0x00000000, + .EmcW2w = 0x00000000, + .EmcR2w = 0x00000005, + .EmcW2r = 0x0000000a, + .EmcR2p = 0x00000003, + .EmcW2p = 0x0000000b, + .EmcRdRcd = 0x00000002, + .EmcWrRcd = 0x00000002, + .EmcRrd = 0x00000003, + .EmcRext = 0x00000003, + .EmcWext = 0x00000000, + .EmcWdv = 0x00000005, + .EmcWdvMask = 0x00000005, + .EmcQUse = 0x00000006, + .EmcQuseWidth = 0x00000002, + .EmcIbdly = 0x00000000, + .EmcEInput = 0x00000004, + .EmcEInputDuration = 0x00000006, + .EmcPutermExtra = 0x00010000, + .EmcPutermWidth = 0x00000003, + .EmcPutermAdj = 0x00000000, + .EmcCdbCntl1 = 0x00000000, + .EmcCdbCntl2 = 0x00000000, + .EmcCdbCntl3 = 0x00000000, + .EmcQRst = 0x00000003, + .EmcQSafe = 0x0000000d, + .EmcRdv = 0x0000000f, + .EmcRdvMask = 0x00000011, + .EmcQpop = 0x0000000a, + .EmcCtt = 0x00000000, + .EmcCttDuration = 0x00000003, + .EmcRefresh = 0x00000607, + .EmcBurstRefreshNum = 0x00000000, + .EmcPreRefreshReqCnt = 0x00000181, + .EmcPdEx2Wr = 0x00000002, + .EmcPdEx2Rd = 0x00000002, + .EmcPChg2Pden = 0x00000001, + .EmcAct2Pden = 0x00000000, + .EmcAr2Pden = 0x00000032, + .EmcRw2Pden = 0x0000000f, + .EmcTxsr = 0x00000038, + .EmcTxsrDll = 0x00000038, + .EmcTcke = 0x00000004, + .EmcTckesr = 0x00000005, + .EmcTpd = 0x00000004, + .EmcTfaw = 0x00000007, + .EmcTrpab = 0x00000000, + .EmcTClkStable = 0x00000005, + .EmcTClkStop = 0x00000005, + .EmcTRefBw = 0x00000638, + .EmcFbioCfg5 = 0x106aa298, + .EmcFbioCfg6 = 0x00000000, + .EmcFbioSpare = 0x00000000, + .EmcCfgRsv = 0xff00ff00, + .EmcMrs = 0x80001221, + .EmcEmrs = 0x80100003, + .EmcEmrs2 = 0x80200008, + .EmcEmrs3 = 0x80300000, + .EmcMrw1 = 0x00000000, + .EmcMrw2 = 0x00000000, + .EmcMrw3 = 0x00000000, + .EmcMrw4 = 0x00000000, + .EmcMrwExtra = 0x00000000, + .EmcWarmBootMrwExtra = 0x00000000, + .EmcWarmBootExtraModeRegWriteEnable = 0x00000000, + .EmcExtraModeRegWriteEnable = 0x00000000, + .EmcMrwResetCommand = 0x00000000, + .EmcMrwResetNInitWait = 0x00000000, + .EmcMrsWaitCnt = 0x000c000c, + .EmcMrsWaitCnt2 = 0x000c000c, + .EmcCfg = 0x73240000, + .EmcCfg2 = 0x0000088d, + .EmcCfgPipe = 0x0000d2b3, + .EmcDbg = 0x01000c00, + .EmcCmdQ = 0x10004408, + .EmcMc2EmcQ = 0x06000404, + .EmcDynSelfRefControl = 0x80000d22, + .AhbArbitrationXbarCtrlMemInitDone = 0x00000001, + .EmcCfgDigDll = 0x002c00a0, + .EmcCfgDigDllPeriod = 0x00008000, + .EmcDevSelect = 0x00000002, + .EmcSelDpdCtrl = 0x00040008, + .EmcDllXformDqs0 = 0x00064000, + .EmcDllXformDqs1 = 0x00064000, + .EmcDllXformDqs2 = 0x00064000, + .EmcDllXformDqs3 = 0x00064000, + .EmcDllXformDqs4 = 0x00064000, + .EmcDllXformDqs5 = 0x00064000, + .EmcDllXformDqs6 = 0x00064000, + .EmcDllXformDqs7 = 0x00064000, + .EmcDllXformDqs8 = 0x00064000, + .EmcDllXformDqs9 = 0x00064000, + .EmcDllXformDqs10 = 0x00064000, + .EmcDllXformDqs11 = 0x00064000, + .EmcDllXformDqs12 = 0x00064000, + .EmcDllXformDqs13 = 0x00064000, + .EmcDllXformDqs14 = 0x00064000, + .EmcDllXformDqs15 = 0x00064000, + .EmcDllXformQUse0 = 0x00000000, + .EmcDllXformQUse1 = 0x00000000, + .EmcDllXformQUse2 = 0x00000000, + .EmcDllXformQUse3 = 0x00000000, + .EmcDllXformQUse4 = 0x00000000, + .EmcDllXformQUse5 = 0x00000000, + .EmcDllXformQUse6 = 0x00000000, + .EmcDllXformQUse7 = 0x00000000, + .EmcDllXformAddr0 = 0x00000000, + .EmcDllXformAddr1 = 0x00000000, + .EmcDllXformAddr2 = 0x00004000, + .EmcDllXformAddr3 = 0x00000000, + .EmcDllXformAddr4 = 0x00000000, + .EmcDllXformAddr5 = 0x00004000, + .EmcDllXformQUse8 = 0x00000000, + .EmcDllXformQUse9 = 0x00000000, + .EmcDllXformQUse10 = 0x00000000, + .EmcDllXformQUse11 = 0x00000000, + .EmcDllXformQUse12 = 0x00000000, + .EmcDllXformQUse13 = 0x00000000, + .EmcDllXformQUse14 = 0x00000000, + .EmcDllXformQUse15 = 0x00000000, + .EmcDliTrimTxDqs0 = 0x00000000, + .EmcDliTrimTxDqs1 = 0x00000000, + .EmcDliTrimTxDqs2 = 0x00000000, + .EmcDliTrimTxDqs3 = 0x00000000, + .EmcDliTrimTxDqs4 = 0x00000000, + .EmcDliTrimTxDqs5 = 0x00000000, + .EmcDliTrimTxDqs6 = 0x00000000, + .EmcDliTrimTxDqs7 = 0x00000000, + .EmcDliTrimTxDqs8 = 0x00000000, + .EmcDliTrimTxDqs9 = 0x00000000, + .EmcDliTrimTxDqs10 = 0x00000000, + .EmcDliTrimTxDqs11 = 0x00000000, + .EmcDliTrimTxDqs12 = 0x00000000, + .EmcDliTrimTxDqs13 = 0x00000000, + .EmcDliTrimTxDqs14 = 0x00000000, + .EmcDliTrimTxDqs15 = 0x00000000, + .EmcDllXformDq0 = 0x00090000, + .EmcDllXformDq1 = 0x00090000, + .EmcDllXformDq2 = 0x00094000, + .EmcDllXformDq3 = 0x00094000, + .EmcDllXformDq4 = 0x00009400, + .EmcDllXformDq5 = 0x00009000, + .EmcDllXformDq6 = 0x00009000, + .EmcDllXformDq7 = 0x00009000, + .WarmBootWait = 0x00000002, + .EmcCttTermCtrl = 0x00000802, + .EmcOdtWrite = 0x00000000, + .EmcOdtRead = 0x00000000, + .EmcZcalInterval = 0x00020000, + .EmcZcalWaitCnt = 0x00000042, + .EmcZcalMrwCmd = 0x80000000, + .EmcMrsResetDll = 0x00000000, + .EmcZcalInitDev0 = 0x80000011, + .EmcZcalInitDev1 = 0x00000000, + .EmcZcalInitWait = 0x00000003, + .EmcZcalWarmColdBootEnables = 0x00000003, + .EmcMrwLpddr2ZcalWarmBoot = 0x040a00ab, + .EmcZqCalDdr3WarmBoot = 0x00000000, + .EmcZcalWarmBootWait = 0x00000002, + .EmcMrsWarmBootEnable = 0x00000001, + .EmcMrsResetDllWait = 0x00000000, + .EmcMrsExtra = 0x80001221, + .EmcWarmBootMrsExtra = 0x80100003, + .EmcEmrsDdr2DllEnable = 0x00000000, + .EmcMrsDdr2DllReset = 0x00000000, + .EmcEmrsDdr2OcdCalib = 0x00000000, + .EmcDdr2Wait = 0x00000000, + .EmcClkenOverride = 0x00000000, + .McDisExtraSnapLevels = 0x00000000, + .EmcExtraRefreshNum = 0x00000002, + .EmcClkenOverrideAllWarmBoot = 0x00000000, + .McClkenOverrideAllWarmBoot = 0x00000000, + .EmcCfgDigDllPeriodWarmBoot = 0x00000003, + .PmcVddpSel = 0x00000002, + .PmcVddpSelWait = 0x00000002, + .PmcDdrPwr = 0x00000003, + .PmcDdrCfg = 0x00002002, + .PmcIoDpd3Req = 0x4fff2f97, + .PmcIoDpd3ReqWait = 0x00000000, + .PmcRegShort = 0x00000000, + .PmcNoIoPower = 0x00000000, + .PmcPorDpdCtrlWait = 0x00000000, + .EmcXm2CmdPadCtrl = 0x10000280, + .EmcXm2CmdPadCtrl2 = 0x770c0000, + .EmcXm2CmdPadCtrl3 = 0x050c0000, + .EmcXm2CmdPadCtrl4 = 0x00000000, + .EmcXm2CmdPadCtrl5 = 0x00111111, + .EmcXm2DqsPadCtrl = 0x770c1414, + .EmcXm2DqsPadCtrl2 = 0x0130b118, + .EmcXm2DqsPadCtrl3 = 0x51451400, + .EmcXm2DqsPadCtrl4 = 0x00514514, + .EmcXm2DqsPadCtrl5 = 0x00514514, + .EmcXm2DqsPadCtrl6 = 0x51451400, + .EmcXm2DqPadCtrl = 0x770c2990, + .EmcXm2DqPadCtrl2 = 0x00000000, + .EmcXm2DqPadCtrl3 = 0x00000000, + .EmcXm2ClkPadCtrl = 0x77ffc081, + .EmcXm2ClkPadCtrl2 = 0x00000303, + .EmcXm2CompPadCtrl = 0x81f1f108, + .EmcXm2VttGenPadCtrl = 0x07070004, + .EmcXm2VttGenPadCtrl2 = 0x0000003f, + .EmcXm2VttGenPadCtrl3 = 0x016eeeee, + .EmcAcpdControl = 0x00000000, + .EmcSwizzleRank0ByteCfg = 0x00003120, + .EmcSwizzleRank0Byte0 = 0x25143067, + .EmcSwizzleRank0Byte1 = 0x45367102, + .EmcSwizzleRank0Byte2 = 0x47106253, + .EmcSwizzleRank0Byte3 = 0x04362175, + .EmcSwizzleRank1ByteCfg = 0x00003120, + .EmcSwizzleRank1Byte0 = 0x71546032, + .EmcSwizzleRank1Byte1 = 0x35104276, + .EmcSwizzleRank1Byte2 = 0x27043615, + .EmcSwizzleRank1Byte3 = 0x72306145, + .EmcDsrVttgenDrv = 0x0000003f, + .EmcTxdsrvttgen = 0x00000066, + .EmcBgbiasCtl0 = 0x00000008, + .McEmemAdrCfg = 0x00000000, + .McEmemAdrCfgDev0 = 0x00080303, + .McEmemAdrCfgDev1 = 0x00080303, + .McEmemAdrCfgBankMask0 = 0x00001248, + .McEmemAdrCfgBankMask1 = 0x00002490, + .McEmemAdrCfgBankMask2 = 0x00000920, + .McEmemAdrCfgBankSwizzle3 = 0x00000001, + .McEmemCfg = 0x00000800, + .McEmemArbCfg = 0x01000003, + .McEmemArbOutstandingReq = 0x80000040, + .McEmemArbTimingRcd = 0x00000001, + .McEmemArbTimingRp = 0x00000001, + .McEmemArbTimingRc = 0x00000005, + .McEmemArbTimingRas = 0x00000002, + .McEmemArbTimingFaw = 0x00000004, + .McEmemArbTimingRrd = 0x00000001, + .McEmemArbTimingRap2Pre = 0x00000002, + .McEmemArbTimingWap2Pre = 0x00000008, + .McEmemArbTimingR2R = 0x00000003, + .McEmemArbTimingW2W = 0x00000002, + .McEmemArbTimingR2W = 0x00000004, + .McEmemArbTimingW2R = 0x00000006, + .McEmemArbDaTurns = 0x06040203, + .McEmemArbDaCovers = 0x000a0405, + .McEmemArbMisc0 = 0x73840a06, + .McEmemArbMisc1 = 0x70000f03, + .McEmemArbRing1Throttle = 0x001f0000, + .McEmemArbOverride = 0x10000000, + .McEmemArbOverride1 = 0x00000000, + .McEmemArbRsv = 0xff00ff00, + .McClkenOverride = 0x00000000, + .McStatControl = 0x00000000, + .McDisplaySnapRing = 0x00000003, + .McVideoProtectBom = 0xfff00000, + .McVideoProtectBomAdrHi = 0x00000000, + .McVideoProtectSizeMb = 0x00000000, + .McVideoProtectVprOverride = 0xe4bac743, + .McVideoProtectVprOverride1 = 0x00000013, + .McVideoProtectGpuOverride0 = 0x00000000, + .McVideoProtectGpuOverride1 = 0x00000000, + .McSecCarveoutBom = 0xfff00000, + .McSecCarveoutAdrHi = 0x00000000, + .McSecCarveoutSizeMb = 0x00000000, + .McVideoProtectWriteAccess = 0x00000000, + .McSecCarveoutProtectWriteAccess = 0x00000000, + .EmcCaTrainingEnable = 0x00000000, + .EmcCaTrainingTimingCntl1 = 0x1f7df7df, + .EmcCaTrainingTimingCntl2 = 0x0000001f, + .SwizzleRankByteEncode = 0x0000006f, + .BootRomPatchControl = 0x00000000, + .BootRomPatchData = 0x00000000, + .McMtsCarveoutBom = 0xfff00000, + .McMtsCarveoutAdrHi = 0x00000000, + .McMtsCarveoutSizeMb = 0x00000000, + .McMtsCarveoutRegCtrl = 0x00000000, +}, -- cgit v1.2.3