From 356b519049e6d40e15b2e4a85cae654e2e8df8ba Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 24 Jun 2017 21:53:37 -0600 Subject: mainboard/[g-l]: add IS_ENABLED() around Kconfig symbol references Change-Id: I1f906c8c465108017bc4d08534653233078ef32d Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20343 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/google/nyan_blaze/romstage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google/nyan_blaze') diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c index e3d7116d1a..f094e348f7 100644 --- a/src/mainboard/google/nyan_blaze/romstage.c +++ b/src/mainboard/google/nyan_blaze/romstage.c @@ -53,7 +53,7 @@ static void __attribute__((noinline)) romstage(void) u32 dram_end_mb = sdram_max_addressable_mb(); u32 dram_size_mb = dram_end_mb - dram_start_mb; -#if !CONFIG_VBOOT +#if !IS_ENABLED(CONFIG_VBOOT) configure_l2_cache(); mmu_init(); /* Device memory below DRAM is uncached. */ @@ -96,7 +96,7 @@ static void __attribute__((noinline)) romstage(void) /* Stub to force arm_init_caches to the top, before any stack/memory accesses */ void main(void) { -#if !CONFIG_VBOOT +#if !IS_ENABLED(CONFIG_VBOOT) asm volatile ("bl arm_init_caches" ::: "r0","r1","r2","r3","r4","r5","ip"); #endif -- cgit v1.2.3