From 261d626669ea244a55ec310a11a23ca56b609b51 Mon Sep 17 00:00:00 2001 From: Shaunak Saha Date: Tue, 28 Aug 2018 15:46:01 -0700 Subject: mb/google/poppy: Set UPD CmdTriStateDis for Nocturne This patch sets the MRC UPD CmdTriStateDis for the nocturne boards.Nocturne is LPDDR3 design without RTT for CMD/CTRL. BUG=b:111812662 TEST=Run memtester app and also webgl fishtank on the LPDDR3 kabylake boards and also check the margin data is proper in FSP. Change-Id: I0f593761dcbd121e7e758421af178931b9d78295 Signed-off-by: Shaunak Saha Reviewed-on: https://review.coreboot.org/28379 Reviewed-by: Furquan Shaikh Reviewed-by: Nick Vaccaro Tested-by: build bot (Jenkins) --- src/mainboard/google/poppy/variants/nocturne/devicetree.cb | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mainboard/google/poppy/variants/nocturne') diff --git a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb index a6988fa4ec..3359a77d51 100644 --- a/src/mainboard/google/poppy/variants/nocturne/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nocturne/devicetree.cb @@ -29,6 +29,9 @@ chip soc/intel/skylake # Enable S0ix register "s0ix_enable" = "1" + # Disable Command TriState + register "CmdTriStateDis" = "1" + # FSP Configuration register "ProbelessTrace" = "0" register "EnableLan" = "0" -- cgit v1.2.3