From 6ecf3f66010ec5611a83f8da77513213fe52be80 Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Fri, 1 Aug 2014 15:11:11 -0500 Subject: tegra132: add bootblock_mainboard_early_init() Instead of hard coding certain pieces of a board in the common chipset code provide a way to initialize things early in the bootblock path. Add a bootblock_mainboard_early_init() function before console init to performany necessary mainboard initialization early in the bootblock. BUG=chrome-os-partner:31104 BUG=chrome-os-partner:31105 BUG=chrome-os-partner:29981 BRANCH=None TEST=built both on rush and ryu. rush still behaves the same. Change-Id: Idcf081eeffd189a4e2cbfeb8a4ac5dd0a3d1f838 Signed-off-by: Patrick Georgi Original-Commit-Id: 4a523add6de03bea0d88e95b9dbb5e283c629400 Original-Change-Id: I7d93641dff3a961f120e8f0ec2d959182477ef87 Original-Signed-off-by: Aaron Durbin Original-Reviewed-on: https://chromium-review.googlesource.com/210835 Original-Reviewed-by: Furquan Shaikh Reviewed-on: http://review.coreboot.org/8877 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/rush/bootblock.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) (limited to 'src/mainboard/google/rush/bootblock.c') diff --git a/src/mainboard/google/rush/bootblock.c b/src/mainboard/google/rush/bootblock.c index 51fe9b3e99..b74baeeac7 100644 --- a/src/mainboard/google/rush/bootblock.c +++ b/src/mainboard/google/rush/bootblock.c @@ -18,11 +18,12 @@ */ #include -#include #include #include #include +#include #include +#include #include #include #include @@ -33,6 +34,24 @@ static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE; +static const struct pad_config uart_console_pads[] = { + /* Hard coded pad usage for UARTA. */ + PAD_CFG_SFIO(KB_ROW9, 0, UA3), + PAD_CFG_SFIO(KB_ROW10, PINMUX_INPUT_ENABLE | PINMUX_PULL_UP, UA3), + /* + * Disable UART2 pads as they are default connected to UARTA controller. + */ + PAD_CFG_UNUSED(UART2_RXD), + PAD_CFG_UNUSED(UART2_TXD), + PAD_CFG_UNUSED(UART2_RTS_N), + PAD_CFG_UNUSED(UART2_CTS_N), +}; + +void bootblock_mainboard_early_init(void) +{ + soc_configure_pads(uart_console_pads, ARRAY_SIZE(uart_console_pads)); +} + static void set_clock_sources(void) { /* UARTA gets PLLP, deactivate CLK_UART_DIV_OVERRIDE */ -- cgit v1.2.3