From d0f971fe9a5d3c081d932a767b7373acc5f00b4a Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 12 Mar 2021 14:20:05 +0100 Subject: nb/intel/haswell: Decouple mainboard USB config from MRC With this change, only raminit.c uses pei_data.h definitions. With MRC cornered, making it optional is just a matter of writing a replacement. USB config definitions will be moved to Lynx Point code in a follow-up. Tested on Asrock B85M Pro4, still boots and still resumes from S3. Change-Id: I4bc405213e9b0828d9ced18677335533c7dd381d Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/51440 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/mainboard/google/slippy/variants/falco/romstage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/mainboard/google/slippy/variants/falco/romstage.c') diff --git a/src/mainboard/google/slippy/variants/falco/romstage.c b/src/mainboard/google/slippy/variants/falco/romstage.c index e808182274..9ab76292fb 100644 --- a/src/mainboard/google/slippy/variants/falco/romstage.c +++ b/src/mainboard/google/slippy/variants/falco/romstage.c @@ -25,7 +25,7 @@ bool variant_is_dual_channel(const unsigned int spd_index) } } -const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = { +const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = { /* Length, Enable, OCn#, Location */ { 0x0064, 1, 0, /* P0: Port A, CN8 */ USB_PORT_BACK_PANEL }, @@ -45,7 +45,7 @@ const struct usb2_port_setting mainboard_usb2_ports[MAX_USB2_PORTS] = { USB_PORT_INTERNAL }, }; -const struct usb3_port_setting mainboard_usb3_ports[MAX_USB3_PORTS] = { +const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS] = { /* Enable, OCn# */ { 1, 0 }, /* P1; Port A, CN8 */ { 1, 0 }, /* P2; Port B, CN9 */ -- cgit v1.2.3