From 9761a7a2950796fe33b01c10a6d1026a855bb670 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Mon, 6 Jul 2015 13:40:50 -0700 Subject: smaug: Update PMIC settings Update PMIC settings as per table provided by hardware eng team. Change-Id: I17a8a1a44fa8c9093e13e8d7e4a2f5b07a3b1f1f Signed-off-by: Patrick Georgi Original-Commit-Id: 3c49afd0d1a17b73f2192206ff7389e2f7930fec Original-Change-Id: I027febb6849f1c4d15bf56d8bcd29c431655c7b6 Original-Signed-off-by: Furquan Shaikh Original-Reviewed-on: https://chromium-review.googlesource.com/283543 Original-Trybot-Ready: Furquan Shaikh Original-Tested-by: Furquan Shaikh Original-Reviewed-by: Furquan Shaikh Original-Commit-Queue: Furquan Shaikh Reviewed-on: http://review.coreboot.org/10843 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Stefan Reinauer --- src/mainboard/google/smaug/pmic.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'src/mainboard/google/smaug/pmic.h') diff --git a/src/mainboard/google/smaug/pmic.h b/src/mainboard/google/smaug/pmic.h index d38b3282b7..4cdae4284b 100644 --- a/src/mainboard/google/smaug/pmic.h +++ b/src/mainboard/google/smaug/pmic.h @@ -25,6 +25,7 @@ #define MAX77620_SD1_REG 0x17 #define MAX77620_SD2_REG 0x18 #define MAX77620_SD3_REG 0x19 +#define MAX77620_VDVSSD0_REG 0x1B #define MAX77620_CNFG2SD_REG 0x22 #define MAX77620_CNFG1_L0_REG 0x23 @@ -71,6 +72,8 @@ #define MAX77621_VOUT_REG 0x00 #define MAX77621_VOUT_DVC_REG 0x01 +#define MAX77621_CONTROL1_REG 0x02 +#define MAX77621_CONTROL2_REG 0x03 void pmic_init(unsigned bus); void pmic_write_reg_77620(unsigned bus, uint8_t reg, uint8_t val, -- cgit v1.2.3