From 5304ce108e1f8fceff543543be092253cf09edb0 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 2 Apr 2021 22:55:00 +0200 Subject: nb/intel/sandybridge: Drop `pci_mmio_size` There's no good reason to use values smaller than 2 GiB here. Well, it increases available DRAM in 32-bit space. However, as this is a 64-bit platform, it's highly unlikely that 32-bit limitations would cause any issues anymore. It's more likely to have the allocator give up because memory-mapped resources in 32-bit space don't fit within the specified MMIO size, which can easily occur when using a discrete graphics card. Change-Id: If585b6044f58b1e5397457f3bfa906aafc7f9297 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/52072 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/mainboard/google/stout/devicetree.cb | 2 -- 1 file changed, 2 deletions(-) (limited to 'src/mainboard/google/stout/devicetree.cb') diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb index 5461b15dd9..73dce98ed0 100644 --- a/src/mainboard/google/stout/devicetree.cb +++ b/src/mainboard/google/stout/devicetree.cb @@ -33,8 +33,6 @@ chip northbridge/intel/sandybridge end end - register "pci_mmio_size" = "1024" - device domain 0 on subsystemid 0x1ae0 0xc000 inherit device pci 00.0 on end # host bridge -- cgit v1.2.3