From e4d438e8dcf691e8ef65f32415e9176b11c85fa2 Mon Sep 17 00:00:00 2001 From: ZhengShunQian Date: Thu, 22 Oct 2015 10:33:13 +0800 Subject: google/veyron_emile: Add new board of veyron This is a copy of mickey and renamed. CQ-DEPEND=CL:306967 BUG=chrome-os-partner:46658 TEST=build coreboot BRANCH=veyron Change-Id: I9e1232f3f1334ec747a5beb52f214635a7ab08ae Signed-off-by: Patrick Georgi Original-Commit-Id: 9316a9ec27d5799e290add1e5818f4449b680fde Original-Change-Id: I906de7bbc8b8e110e0774c14ec636a327230b325 Original-Signed-off-by: ZhengShunQian Original-Reviewed-on: https://chromium-review.googlesource.com/307620 Original-Commit-Ready: David Hendricks Original-Tested-by: David Hendricks Original-Tested-by: Shunqian Zheng Original-Reviewed-by: David Hendricks Reviewed-on: http://review.coreboot.org/12394 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/mainboard/google/veyron_emile/chromeos.c | 92 ++++++++++++++++++++++++++++ 1 file changed, 92 insertions(+) create mode 100644 src/mainboard/google/veyron_emile/chromeos.c (limited to 'src/mainboard/google/veyron_emile/chromeos.c') diff --git a/src/mainboard/google/veyron_emile/chromeos.c b/src/mainboard/google/veyron_emile/chromeos.c new file mode 100644 index 0000000000..2222c0e70b --- /dev/null +++ b/src/mainboard/google/veyron_emile/chromeos.c @@ -0,0 +1,92 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2014 Rockchip Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#include +#include +#include +#include +#include + +#include "board.h" + +#define GPIO_WP GPIO(7, A, 6) +#define GPIO_RECOVERY GPIO(0, B, 1) + +void setup_chromeos_gpios(void) +{ + gpio_input(GPIO_WP); + gpio_input_pullup(GPIO_RECOVERY); +} + +void fill_lb_gpios(struct lb_gpios *gpios) +{ + int count = 0; + + /* Write Protect: active low */ + gpios->gpios[count].port = GPIO_WP.raw; + gpios->gpios[count].polarity = ACTIVE_LOW; + gpios->gpios[count].value = gpio_get(GPIO_WP); + strncpy((char *)gpios->gpios[count].name, "write protect", + GPIO_MAX_NAME_LENGTH); + count++; + + /* Recovery: active low */ + gpios->gpios[count].port = GPIO_RECOVERY.raw; + gpios->gpios[count].polarity = ACTIVE_LOW; + gpios->gpios[count].value = gpio_get(GPIO_RECOVERY); + strncpy((char *)gpios->gpios[count].name, "recovery", + GPIO_MAX_NAME_LENGTH); + count++; + + /* Developer: GPIO active high */ + gpios->gpios[count].port = -1; + gpios->gpios[count].polarity = ACTIVE_HIGH; + gpios->gpios[count].value = get_developer_mode_switch(); + strncpy((char *)gpios->gpios[count].name, "developer", + GPIO_MAX_NAME_LENGTH); + count++; + + /* Reset: GPIO active high (output) */ + gpios->gpios[count].port = GPIO_RESET.raw; + gpios->gpios[count].polarity = ACTIVE_HIGH; + gpios->gpios[count].value = -1; + strncpy((char *)gpios->gpios[count].name, "reset", + GPIO_MAX_NAME_LENGTH); + count++; + + gpios->size = sizeof(*gpios) + (count * sizeof(struct lb_gpio)); + gpios->count = count; + + printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size); +} + +int get_developer_mode_switch(void) +{ + return 0; +} + +int get_recovery_mode_switch(void) +{ + return !gpio_get(GPIO_RECOVERY); +} + +int get_write_protect_state(void) +{ + return !gpio_get(GPIO_WP); +} -- cgit v1.2.3