From 15b4580cc6261a94279f4623d7d212443e4feac9 Mon Sep 17 00:00:00 2001 From: "jinkun.hong" Date: Tue, 17 Mar 2015 15:49:17 +0800 Subject: google/veyron_*: update sdram-ddr3-samsung-4GB.inc The old parameters are wrong. K4B8G1646Q: rank = 2, row = 15 is right. BUG=None TEST=Boot from veyron BRANCH=None Change-Id: I41848c158f3ea028035cc8c0d969a4a449390a54 Signed-off-by: Patrick Georgi Original-Commit-Id: 601ba06c636ff0f0779e6ef9357b53060a1ec19b Original-Change-Id: I5bc6798890b3ba0f5134d048ae6bbf2bfd696676 Original-Signed-off-by: jinkun.hong Original-Reviewed-on: https://chromium-review.googlesource.com/260483 Original-Reviewed-by: Julius Werner Original-Tested-by: Paul Ma Reviewed-on: http://review.coreboot.org/9866 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- .../veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) (limited to 'src/mainboard/google/veyron_jerry') diff --git a/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc b/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc index bd6201c456..a32f1a6129 100644 --- a/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc +++ b/src/mainboard/google/veyron_jerry/sdram_inf/sdram-ddr3-samsung-4GB.inc @@ -2,24 +2,24 @@ /* 4 Samsung K4B8G1646Q chips */ { { - .rank = 0x1, + .rank = 0x2, .col = 0xA, .bk = 0x3, .bw = 0x2, .dbw = 0x1, .row_3_4 = 0x0, - .cs0_row = 0x10, - .cs1_row = 0x10 + .cs0_row = 0xF, + .cs1_row = 0xF }, { - .rank = 0x1, + .rank = 0x2, .col = 0xA, .bk = 0x3, .bw = 0x2, .dbw = 0x1, .row_3_4 = 0x0, - .cs0_row = 0x10, - .cs1_row = 0x10 + .cs0_row = 0xF, + .cs1_row = 0xF } }, { @@ -69,7 +69,7 @@ }, .noc_timing = 0x30B25564, .noc_activate = 0x627, - .ddrconfig = 4, + .ddrconfig = 3, .ddr_freq = 666*MHz, .dramtype = DDR3, .num_channels = 2, -- cgit v1.2.3